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Aluminum bond pads on semiconductor chips play an important role in chips functionality and reliability. Bond pad peeling during wire bonding process results in yield reduction. The failure mechanisms of the peeling must be identified so that potential reliability problem of poor bond pad adhesion can be avoided. In this work, FIB, SEM, EDX, and AFM are used to identify the root causes of the peeling. The possible root causes are found to be the presence of an extra layer of thickness of 0.14 m and the poly-silicon surface roughness asperity due to prolonged BOE etching time.

PurposeThe purpose of this paper is to present an update on the progress of the design and reliability of stretchable interconnections for electronic circuits.Design/methodology/approachFinite element modelling (FEM) is used to analyse the physical behaviour of stretchable interconnects under different loading conditions. The fatigue life of a copper interconnect embedded into a silicone matrix has been evaluated using the Coffin‐Manson relation and FEM.FindingsThe mechanical properties of the substrate and the design of the metal interconnection play an important role on the fatigue lifetime of circuit. In the case of copper embedded into a PDMS Sylgard 186, more than 2,500 tensile cycles have been observed for a periodic deformation of 10 per cent.Research limitations/implicationsReliability results are limited and need further work to create a more accurate empirical model to estimate the lifetime of stretchable interconnections.Originality/valueThe combined use of FEM and experimental analysis enable a more reliable design of the stretchable metal interconnections. The proposed horseshoe design offers the benefit of reduced permanent damage during elongation.

In this paper, the effect of annealing condition on the microstructural and mechanical behavior of copper through-silicon via (Cu-TSV) is studied. The hardness of Cu-TSV scaled with the Hall–Petch relation, with the average hardness values of 1.9 GPa, 2.2 GPa and 2.3–2.8 GPa, respectively for the annealed, room temperature (RT) aged and the as-deposited samples. The increase in hardness toward the top of the as-deposited sample is related to the decrease in grain size. The annealed and the as-deposited samples showed a constant elastic modulus (E-modulus) value across the length of Cu-TSV of 140 GPa and 125 GPa respectively, while the RT aged sample showed a degradation in E-modulus from the bottom of the TSV (140 GPa) to the top (110 GPa). These differences in E-modulus values and trends under the different test conditions were found to be unrelated with the crystallographic texture of the samples, but could be related to the presence of residual stresses. No correlation is found between the hardness and E-modulus data. This is attributed to the coupling and competitive effects of grain size and residual stresses, with the grain size effect having a dominant influence on hardness, while the presence of residual stresses dominated the E-modulus result.