Local mechanical stress is currently an important topic of concern in microelectronics processing. A technique that has become increasingly popular for local mechanical stress measurements is micro-Raman spectroscopy. In this paper, the theoretical background of Raman spectroscopy, with special attention to its sensitivity for mechanical stress, is discussed, and practical information is given for the application of this technique to stress measurements in silicon integrated circuits. An overview is given of some important applications of the technique, illustrated with examples from the literature: the first studies of the influence of external stress on the Si Raman modes are reviewed; the application of this technique to measure stress in silicon-on-insulator films is discussed; results of measurements of local stress in isolation structures and trenches are reviewed; and the use of micro-Raman spectroscopy to obtain more information on stress in metals, by measuring the stress in the surrounding Si substrate is explained.
The different steps that have to be taken in order to derive information about local mechanical stress in silicon using micro-Raman spectroscopy experiments, including theoretical and experimental aspects, are discussed. It is shown that the calculations are in general less complicated when they are done in the axes system of the sample. For that purpose, the secular equation is calculated in the axes system [110], [−110], [001], which is important for microelectronics structures. The theory relating Raman mode shift with stress tensor components is applied using two analytical stress models: uniaxial stress and planar stress. The results of these models are fitted to data from micro-Raman spectroscopy experiments on Si3N4/poly-Si lines on silicon substrate. In this fit procedure, the dimensions of the laser spot and its penetration depth in the substrate are also taken into account.
Reliability issues currently hamper the commercialization of capacitive RF MEMS switches. The most important failure mode is parasitic charging of the dielectric of such devices. In this paper we present an improved analytical model that enables us to calculate and understand the effect of insulator charging on the behavior of capacitive RF MEMS switches, and to describe the way they fail, and their reliability. Emphasis is placed on a shift of the pull-out voltage to predict failures. Tests with capacitive RF MEMS switches have been performed that validate the most important features of the model.
One of the most important reliability problems in micro-electromechanical systems (MEMSs) is stiction, the adhesion of contacting surfaces due to surface forces. After reviewing the known physical theory, and the measurement method commonly used to investigate stiction, we present a model that can be used to investigate the sensitivity of MEMS to stiction. It quantitatively predicts the surface interaction energy of surfaces in contact. Included in the model is the roughness of the contacting surfaces and the environmental conditions (humidity and temperature). This is done by describing the surface interaction energy as a function of the distance between the surfaces. This distance is not a unique number, but rather a distribution of distances. It is shown that, if we know this distribution, we can calculate the surface interaction energy. The model is suitable for the prediction of forces due to capillary condensation and molecular interactions.
Vis- and Raman spectroscopy provided more insight into the molecular nature of the radiochromic properties of EBT3 films through the identification of the excited states of PDA and the presence of two PDA conformations. The improved knowledge on the molecular composition of EBT3's active layer provides a framework for future fundamental modeling of the dose-response.
We discuss recent advances made in the theory and measurements of stresses and strains in Si-based heterostructures containing submicron- and micron-size features. Several reports on theoretical as well as experimental studies of stresses in the substrates with local oxidation of silicon structures on the surface have been published recently. With the advent of GeXSi1−X strained layers and stripes extensive studies of both the stripe and the substrate stresses have also been made. Unlike the previous calculations and analytical models, recent finite element (FE) calculations take into account the coupling between the film–substrate stresses without making the approximation that the interface is rigid or that there is no variation of stresses in the stripes in a direction perpendicular to the interface. The results of these calculations have been compared with the analytical models and limitations of the analytical models have been pointed out. Micro-Raman measurements of the stresses in the stripes, quantum wires, quantum dots, and substrates have been made. The measured values of stresses in GeSi stripes and quantum structures agree well with the calculated values by the FE method. The micro-Raman measurements showed that as the ratio R=2l/h (2l is the width and h is the thickness of the stripe) decreases, the shape of the measured normal stresses in the substrate under the stripe (plotted in a direction parallel to the interface) changes dramatically, from concave upward to convex upward. Generation of dislocations in laterally small layers is also discussed briefly. FE calculations of trench-induced stresses which include the effect of the anisotropy of Si have also been made recently. In these calculations realistic experimental conditions were simulated to determine the oxide shape, oxide–interface stresses, and intrinsic and thermal stresses of the polysilicon fill. These values were then used as inputs for the FE calculations. Calculations of stresses induced by oxide-filled trenches were also made assuming that Si is isotropic and that the oxide fill has the same elastic constants as Si. These calculations and results of an earlier analytical model implemented under the same assumptions gave identical results; however, the calculated stress values were in error of 20%–30%. The maximum resolved shear stress for the 60° dislocation induced by a trench is 30% more if it is aligned in 〈110〉 direction rather than in the 〈100〉 direction. This explains the common observation that the 〈100〉-oriented trenches cause fewer dislocations than the 〈110〉 trenches. The characteristics of trench isolated as well as junction isolated bipolar transistors have been studied. The trench isolated transistors had 20% higher gain; however, the collector–base capacitance was higher by up to 50% in the trenched transistors. The increase in capacitance was caused by the anomalous diffusion of the antimony dopant from the buried collector layer induced by the stress field of the trenches. The effect could be eliminated by increasing the depth of the trench. The trenched devices also had higher emitter–collector leakage current caused by the dislocations generated by the trench induced stress field.
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