This paper studies the sensitivity of stress-enhanced transistor performance to layout variations. Stress simulations and mobility models are calibrated and verified for test structures with SiGe source/drain as a stressor. The role of STI on the stress transfer is explored. The numerical results show that variations of 15% in drive currents and of 44% in hole mobility due to layout induced stress variations can occur in the cases studied. These deviations need to be taken into account in circuit design or to be compensated via layout modification.

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Despite the superior working properties, GaN-based HEMTs and systems are still confronted with the threat of a transient ESD event, especially for the vulnerable gate structure of the p-GaN or MOS HEMTs. Therefore, there is still an urgent need for a bidirectional ESD protection diode to improve the ESD robustness of a GaN power system. In this study, an AlGaN/GaN ESD protection diode with bidirectional clamp capability was proposed and investigated. Through the combination of two floating gate electrodes and two pF-grade capacitors connected in parallel between anode or cathode electrodes and the adjacent floating gate electrodes (CGA (CGC)), the proposed diode could be triggered by a required voltage and possesses a high secondary breakdown current (IS) in both forward and reverse transient ESD events. Based on the experimental verification, it was found that the bidirectional triggering voltages (Vtrig) and IS of the proposed diode were strongly related to CGA (CGC). With CGA (CGC) increasing from 5 pF to 25 pF, Vtrig and IS decreased from ~18 V to ~7 V and from ~7 A to ~3 A, respectively. The diode’s high performance demonstrated a good reference for the ESD design of a GaN power system.

In this paper, the degradation behavior of the electrical characteristics was investigated, and trap analysis based on low-frequency noise (LFN) was carried out for the commercial 1.2-kV/30-A silicon carbide (SiC) power MOSFETs under repetitive short-circuit (SC) stress. The experiment results show that the on-state resistance (R dson) and threshold voltage (V th) increase significantly. Meanwhile, the drain-source current (I ds) decreases obviously with the increase of the SC cycles. Furthermore, the gatesource leakage current (I gss) of the SiC power MOSFETs increase greatly and the blocking characteristics deteriorated after 1000 SC cycles. The positive shift was observed on the gate-capacitance versus gatevoltage (C g-V g) curve, which shows that the damage region could be in channel along the SiC/SiO 2 interface after repetitive SC stress. In order to obtain the trap information, trap characterization was performed by using LFN method, and the LFN results show that the trap density increases with the SC cycles. The physical mechanism could be attributed to electrically active traps generated at SiC/SiO 2 interface and oxide layer due to the peak ionization rate, the perpendicular electrical field and high temperature during SC stress. The study may be useful to provide reference for converters design and fault protection of SiC power MOSFETs. INDEX TERMS Repetitive short-circuit (SC), low-frequency noise (LFN), traps, silicon carbide (SiC) power MOSFETs.

The ESD effects on the E-mode AlGaN/GaN high-electron mobility transistors (HEMTs) with p-GaN gate are investigated under repetitive TLP pulses. Firstly, the degradation and recovery of output, transfer characteristics, gate-leakage characteristics and low-frequency noises (LFN) are analyzed in detail before and after reverse electrostatic discharge (ESD) stress. The experimental results show that the electrical characteristics of the devices gradually degraded as the transmission line pulse (TLP) pules increased. Subsequently, the LFN measurements are performed over the frequency range of 1 Hz-10 KHz by increasing TLP pulses. Finally, the recovery tendency of DC (direct current) characteristics and trap density are studied and discussed after resting the device at room temperature for 1 to 3 months. These results physically confirm that the mechanism of the performance degradation and recovery of the devices could be attributed to the trapping and releasing processes of electrons in the p-GaN layer and AlGaN barrier layer of AlGaN/GaN HEMTs, which change the electric field distribution under the gate.

Ferroelectric field effect transistors (FeFETs) using individual GaN nanowire as the conducting channel and Pb(Zr 0.52 Ti 0.48 )O 3 (PZT) thin film as the gate dielectric were fabricated, and their electrical properties were investigated. The curves of the transfer characteristics for the individual GaN nanowire-based FeFET are of counterclockwise hysteresis loops, as the gate voltage was swept from negative to positive and then back. The memory window is about 5 V, and an on/off current ratio is up to 10 3 at zero gate voltage, indicating the feasibility of one-bit ferroelectric memory. The physical mechanism for the memory effect could be attributed to the reversible carrier concentration in individual GaN nanowire, which is modulated by the switchable remnant polarization of PZT thin film. The results may be helpful for the potential application of GaN nanowire in nonvolatile memory. 1 Introduction Semiconductor nanowires are promising candidates for applications throughout the fields ranging from electronics and optoelectronics to energy conversion and spintronics, for instance as field effect transistor (FET), laser, sensor, photovoltaic device, and bioscience device [1][2][3]. Nanowires are particularly attractive due to their unique electrical and optical properties such as their good transportation of charge carriers, large surfaceto-volume ratio, and high crystalline quality [4]. Moreover, they are suitable for increasing the area density of device cells and reducing the operating voltage effectively due to its unique properties that is the small dimension. As a result, the power consumption can be lowered to about several nJ [5]. In particular, GaN nanowire is one of the most important III-V semiconductor nanowire for electronic and optoelectronic applications, owing to its superior properties such as high crystalline quality, large energy bandgap (E g % 3.5 eV), high saturation velocity, and quantum confinement effect [1,6,7]. Thus, it has great potential for realizing next generation nanodevices.The ferroelectric field effect transistor (FeFET) using ferroelectric material as a dielectric layer in a metal-oxidesemiconductor (MOS) FET structure has attracted a great

In this letter, the degradation and recovery characteristics of E-mode AlGaN/GaN high-electron mobility transistors (HEMTs) were investigated under repetitive short-circuit (SC) stress. Output, transfer, transconductance and gate-leakage characteristics were analyzed in detail before and after repetitive SC stress. After stress, the electrical characteristics of the devices gradually degraded as the SC pules increased. Low-frequency noise measurements are performed over the frequency range of 1 Hz–10 KHz by increasing SC pulses. Furthermore, the recovery tendency of DC characteristics and trap density is observed between repetitive SC measurements, and this physically confirms that the mechanism of the performance degradation could be attributed to the trapping and releasing processes of electrons in the p-GaN layer and AlGaN barrier layer of AlGaN/GaN HEMTs, which change the electric field distribution under the gate.