Successful implementation of 3D integration technology requires understanding of the unique yield and reliability issues associated with through-silicon vias (TSVs), with adequate design and process considerations to address these issues. This paper relates to the characterization of thermomechanical stress and reliability issues for Cu-filled TSVs designed for use in 3D Si interposers and 3D wafer-level packaging applications. The paper will describe a variety of methods for characterization of Cu TSV fill quality, microstructure, and thermally-induced TSV height increase known as "copper protrusion" or "copper pumping." An Xray imaging method was used for fast, nondestructive analysis of Cu TSV plating profiles and detection of trapped voids. In addition, a plasma focused ion beam (plasma-FIB) process was used to generate high quality cross sections of full TSVs, 50m in diameter and 150m depth. Imaging of TSVs by Ga FIB channeling contrast and electron backscattered d iffraction (EBSD) provided information about Cu microstructure, including quantitative analysis of grain size. It was observed that TSVs exposed to elevated temperatures exhibited a substantial increase in grain size, which was associated with the Cu protrusion effect. This paper will also report the results of TSV integration with subsequent layers, with analysis of thermo-mechanical failures due to interactions between Cu TSVs and adjacent dielectric layers. The use of an anneal step to stabilize the plated Cu TSVs, prior to build-up of subsequent dielectric layers, will be described
The use of collapsible (solder) bump interconnects in
pixel detector hybridization has been shown to be very successful. However,
as pixel sizes decrease, the use of non-collapsible metal-to-metal bump
bonding methods is needed to push the interconnect dimensions smaller.
Furthermore, these interconnects are compatible with 3D intgration
technologies which are being considered to increase overall pixel and system
performance. These metal-to-metal bonding structures provide robust
mechanical and electrical connections and allow for a dramatic increase in
pixel density. Of particular interest are Cu-Cu thermocompression bonding
and Cu/Sn-Cu solid-liquid diffusion bonding processes.
Working with Fermilab, RTI undertook a demonstration to show that these bump
structures could be reliably used to interconnect devices designed with 20
micron I/O pitch. Cu and Cu/Sn bump fabrication processes were developed to
provide a well-controlled surface topography necessary for the formation of
low resistance, high yielding, and reliable interconnects. The electrical
resistance and yield has been quantified based on electrical measurements of
daisy chain test structures and the mechanical strength of the bonding has
been quantified through die shear testing. The reliability has been
characterized through studies of the impact of thermal exposure on the
mechanical performance of the bonds. Cross-section SEM analysis, coupled
with high resolution energy dispersive spectroscopy, has provided insight
into the physical and chemical nature of the bonding interfaces and aided in
the evaluation of the long-term stability of the bonds.
Planar and helical slow-wave circuits for THz radiation sources have been made using novel microfabrication and assembly methods. A biplanar slow-wave circuit for a 650 GHz backward wave oscillator (BWO) was fabricated through the growth of diamond into high aspect ratio silicon molds and the selective metallization of the tops and sidewalls of 90 µm tall diamond features using lithographically created shadow masks. Helical slow-wave circuits for a 650 GHz BWO and a 95 GHz traveling wave tube were created through the patterning of trenches in thin film diamond, electroplating of gold half-helices, and high accuracy bonding of helix halves. The development of new techniques for the microfabrication of vacuum electronic components will help to facilitate compact and high-power sources for terahertz range radiation.
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