A high density 5V-only flash memory array with sector erase mode is presented. It features a new triple poly splitgate source-side-injection cell in a contactless array to achieve small cell size, high programming efficiency, high cell current, with no over-erase concerns. The array design and its operating conditions in various modes are discussed. Various disturb reduction techniques, array performance and speed improvement schemes are presented.
INTRODUCTIONThe flash memory technology is becoming technology of choice among other memory technologies, due to its capability to replace magnetic disk media (1). Split-gate source-side-injection cell is specially loolung very promising to achieve very high density, low power and 5V/3.3V-only flash memory. This cell has very high programming efficiency and very low write currents. The write currents can be optimized to be as low as luA and the read currents can be as high as 130uA for a cell size of 5 . 6~~2 on a 0.8um technology. The original paper by Kamiya et al., provided
A . T o r i u m i , M . Y o s h i m i , M . I w a s e a n d K . T a n i g u c h i VLSI R e s e a r c h C e n t e r , T o s h i b a C o r p o r a t i o n 1 , K o m u k a i T o s h i b a -c h o , S a i w a i -k u , K a w a s a k i 2 1 0 , J a p a n ABSTRACT P h o t o n e m i s s i o n d u e t o h o t -c a r r i e r e f f e c t
A new cell structure named ACT (Asymmetrical Contactless Transistor) is proposed for high density data storage applications which require low voltage, low power consumption and fast prograderase.The ACT cell with a lightly doped source and heavily doped drain realizes a simple virtual ground array using the Fowler-Nordheim (FN) tunneling mechanism for both program and erase. A selfaligned floating-gate wing technology is introduced to increase gate coupling ratio in wordline direction without sacrificing cell area. A cell area as small as 0 . 3 9~" with a coupling ratio of 0.55 is obtained using 0.3pm process technology.The low programming current of the ACT cell enables multiple programming to be used and thus it is possible to achieve fast programming (< lyshyte) with a low single supply voltage (< 3V). A good disturb immunity in program, erase and read modes is also obtained.
2613-l, Ichinomoto-cho, Tenri-shi, Nara 63 Z, J apan A novel source-side injection split-gate Flash cell with a self-alignedoff-set source (SOS) is proposed for high density low voltageapplications. The SOS split-gate cellmakes it possible to realizenot only SV-only but also 3.3V-only programmingby improvingfurther the programming efficiencyof source-side injectioncells. This cell is suitable for low voltage read-out due to its no-overerase structure. A small cell area of 3.6pm2 with 0.6pm technology acceptablefor 16Mb Flash is also obtained.
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