1985
DOI: 10.1109/t-ed.1985.22180
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Channel-implant dose dependence of hot-carrier generation and injection in submicrometer buried-channel PMOSFET's

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Cited by 8 publications
(4 citation statements)
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“…Drain, substrate, and gate current models, which are valid in the subthreshold region, should be used to model the electron substrate and gate currents at low jV GS j. Figure 6 shows the measured 20) and modeled drain, electron substrate, and electron gate currents with one set of parameters. The BC pMOSFET with L=W ¼ 0:9=19 mm is biased at jV DS j ¼ 6 V. The gate-oxide thickness, junction depth, and substrate doping are 16 nm, 0.25 mm, and 5 Â 10 15 cm À3 , respectively.…”
Section: Resultsmentioning
confidence: 99%
See 1 more Smart Citation
“…Drain, substrate, and gate current models, which are valid in the subthreshold region, should be used to model the electron substrate and gate currents at low jV GS j. Figure 6 shows the measured 20) and modeled drain, electron substrate, and electron gate currents with one set of parameters. The BC pMOSFET with L=W ¼ 0:9=19 mm is biased at jV DS j ¼ 6 V. The gate-oxide thickness, junction depth, and substrate doping are 16 nm, 0.25 mm, and 5 Â 10 15 cm À3 , respectively.…”
Section: Resultsmentioning
confidence: 99%
“…Fig.6. (Color online) Modeled and measured20) drain, substrate, and gate currents in BC pMOSFET as functions of drain and gate voltages with L=W ¼ 0:9=19 mm and t ox ¼ 16 nm.…”
mentioning
confidence: 99%
“…6. Modeled and measured 13) drain, substrate, and gate currents in a BC pMOSFET as a function of drain and gate voltage with L=W ¼ 0:9=19 mm and t ox ¼ 16 nm.…”
Section: Discussionmentioning
confidence: 99%
“…Drain, substrate, and gate current models, which are valid in the subthreshold region, should be used to model the electron substrate and gate currents at low jV GS j. Figure 6 shows the measured 13) and modeled drain, electron substrate, and electron gate currents with one set of parameters. The BC pMOSFET has L=W ¼ 0:9=19 mm and is biased at jV DS j ¼ 6 V. The gate-oxide thickness, junction depth, and substrate doping are 16 nm, 0.25 mm, and 5 Â 10 15 cm À3 , respectively.…”
Section: Substrate and Gate Currentmentioning
confidence: 99%