Articles you may be interested inInterface traps responsible for negative bias temperature instability in a nitrided submicron metal-oxidesemiconductor field effect transistor Appl. Phys. Lett. 98, 103513 (2011); 10.1063/1.3559223Role of shallow Si / SiO 2 interface states on high frequency channel noise in n -channel metal-oxidesemiconductor field effect transistors

The charge pumping technique is shown to be a very efficient method for studying the slow traps in the oxide of metal–oxide–semiconductor (MOS) transistors. The trap concentration is obtained by varying the gate pulse frequency, the other measurement parameters being kept constant. The concentrations measured on virgin devices are in agreement with those generally obtained on state-of-the-art MOS transistors using noise measurements. On virgin and stressed devices, they also agree with those measured using a drain current transient technique. The concentration profiles show an increase of the trap density near the oxide–semiconductor interface.

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Charge pumping (CP) is the most widely used Si−SiO2 interface trap electrical characterization technique. However, several important characteristics and basic principles of this technique have not yet been rigorously defined. In this article, the onsets of nonsteady-state carrier emission and steady-state carrier capture, which occur during the transition edges of the gate signal when large gate pulses are used, are defined. The energies at the Si−SiO2 interface where these mechanisms start are calculated. Then, the case of asymmetrical or of small gate pulses, where capture of at least one carrier type cannot occur during the transition edges of the gate signal but proceeds during the following steady-state bias, is dealt with. The consequences of such a situation on the contribution of carrier emission to the CP current is studied. This allows a model which accurately describes the CP current in a large number of situations to be obtained. Using this model, it is shown that when the trap capture cross sections are small near the band edges, the energies where non-steady-state carrier emission takes place, interact with the high and/or low Fermi-level position. It is also shown that under asymmetrical biases, the energy regions in the upper and lower half of the band gap contributing to the CP current vary nearly symmetrically. This model is used for discussing the reliability of two-level CP for extracting interface trap concentration versus energy, Dit(E), profiles in metal–oxide–semiconductor devices. A comparison is carried out with the simplified extraction methods found in literature. The influence, on the Dit(E) profiles, of the trap cross sections and of the biases is discussed. The advantages of the spectroscopic CP are pointed out.

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Pixels in complementary metal-oxide-semiconductor (CMOS) image sensors (CISs) are being scaled downward toward 1.0 lm. In this context, improvements in crucial parameters such as dark current per pixel, which suffers from defects incorporated during processing, need to be achieved. Indeed, accidental metallic contamination is a critical issue that induces dark current and reduces yield. In this paper, detection and characterization of gold and tungsten implanted in CISs using dark-current and deep-level transient spectroscopies are reported. Deep levels responsible for dark current are identified, and tungsten is studied for the first time with dark current spectroscopy.

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