We have fabricated GeO2∕Ge metal-oxide-semiconductor (MOS) structures by direct thermal oxidation of Ge substrates. The interface trap density (Dit) of Al∕GeO2∕Ge MOS structures, measured by the low temperature conductance method including the effect of the surface potential fluctuation, is found to be reduced as the oxidation temperature increases. The minimum values of Dit can be obtained for the oxidation around 575°C, which is in the maximum temperature range where GeO volatilization does not occur under atmospheric pressure of O2. It is also found that the hydrogen annealing before Al gate formation is effective for the passivation of GeO2∕Ge interface states. It is clarified, as a result, that the minimum Dit value lower than 1011cm−2eV−1 can be obtained for GeO2∕Ge MOS interfaces fabricated by direct oxidation of Ge substrates.

We have fabricated GeO2/Ge interfaces on (100), (110), and (111) orientation substrates by direct thermal oxidation. The x-ray photoelectron spectroscopy analyses suggest that the Ge oxides are composed of GeO2 and have almost the same interfacial structure, independent of the surface orientations. The gate current conduction mechanism through the GeO2/Ge metal-oxide-semiconductor structure is dominated by Fowler–Nordheim tunneling. In addition, the barrier height between Ge and GeO2 is evaluated to be 1.2–1.4 eV. In interface trap density (Dit) measurement by using the low temperature conductance method, the amount of Dit in the conduction band side is also almost the same, while Dit in the valence band side is lowest for the (111) surface. Minimum detectable Dit is lower than 1×1011 eV−1 cm2 for all the orientations. These surface orientation dependences of the GeO2/Ge interface properties are quite different from those of the SiO2/Si interface.

We have successfully fabricated high hole mobility Ge p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) with GeO 2 /Ge formed by direct thermal oxidation, which can yield a significantly low interface trap density (D it ). Al 2 O 3 films are employed as capping layers for protecting the GeO 2 /Ge MOS interfaces during the MOSFET fabrication processes. The source/drain (S/D) regions are formed by boron ion implantation in a self-align way with Al gate metal. The good MOS interface properties are found to be maintained even after the activation annealing at temperatures sufficient for obtaining the excellent junction properties. The fabricated MOSFETs exhibit high source and drain on/off current ratios of 10 5 -10 4 and a high peak hole mobility of 575 cm 2 V À1 s À1 at maximum, both of which are attributable to the excellent GeO 2 /Ge MOS interface properties. The effects of the substrate impurity concentration and the thickness of GeO 2 on the hole mobility are examined. It is found from the results for different substrate impurity concentrations that the universal curve between hole mobility and the effective field E eff holds for ¼ 1=3. We also investigate the impact of the oxidation temperature dependence on hole mobility in order to examine the scattering mechanism limiting the mobility of GeO 2 /Ge interfaces through the modulation of the MOS interfaces by changing oxidation temperature. It is found that the mobility in low-temperature and low-surface carrier density (N s ) regions is well corrected with D it evaluated from S factors in MOSFETs. In addition, it is revealed from transmission electron microscopy analyses that the interface roughness between GeO 2 and Ge is reduced with increasing oxidation temperature. From these experimental results, the higher mobility of GeO 2 /Ge p-MOSFET at higher oxidation temperatures can be explained by the reduction in the density of Coulomb scattering centers and surface roughness at elevated Ge oxidation temperatures. #

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