2008
DOI: 10.1063/1.2959731
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Evidence of low interface trap density in GeO2∕Ge metal-oxide-semiconductor structures fabricated by thermal oxidation

Abstract: We have fabricated GeO2∕Ge metal-oxide-semiconductor (MOS) structures by direct thermal oxidation of Ge substrates. The interface trap density (Dit) of Al∕GeO2∕Ge MOS structures, measured by the low temperature conductance method including the effect of the surface potential fluctuation, is found to be reduced as the oxidation temperature increases. The minimum values of Dit can be obtained for the oxidation around 575°C, which is in the maximum temperature range where GeO volatilization does not occur under a… Show more

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Cited by 354 publications
(247 citation statements)
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“…The incorporation of Ge in dielectric insulator is believed to act as defect traps and thereby causes an increased gate leakage current. 2,5,13 In this study, the implementation of SCF treatment after PDA process significantly reduces leakage current of gate insulator and recovers the C-V characteristic to a similar state as the initial Ge-MOS device without PDA process ͑control sample͒. This indicates again that oxidant ͑H 2 O molecule͒ is effectively transported into SiO 2 film by the high-pressure SCF and passivates the defect states generated in the Ge-MOS device during hightemperature thermal PDA process.…”
Section: Fig 2 ͑Color Online͒ ͑A͒mentioning
confidence: 58%
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“…The incorporation of Ge in dielectric insulator is believed to act as defect traps and thereby causes an increased gate leakage current. 2,5,13 In this study, the implementation of SCF treatment after PDA process significantly reduces leakage current of gate insulator and recovers the C-V characteristic to a similar state as the initial Ge-MOS device without PDA process ͑control sample͒. This indicates again that oxidant ͑H 2 O molecule͒ is effectively transported into SiO 2 film by the high-pressure SCF and passivates the defect states generated in the Ge-MOS device during hightemperature thermal PDA process.…”
Section: Fig 2 ͑Color Online͒ ͑A͒mentioning
confidence: 58%
“…13 It was also reported that high-performance Ge MOSFET could be realized by careful control of interfacial GeO 2 formation. 2 In this study, a lowtemperature supercritical CO 2 ͑SCCO 2 ͒ fluid technology is proposed as a postgate dielectric treatment at 150°C to improve the SiO 2 / Ge interface after high-temperature PDA process. The SCCO 2 , which exists above its critical pressure ͑1170 psi͒ and temperature ͑30°C͒, provides good liquidlike solvency and high gaslike diffusivity, giving it excellent transport capacity.…”
mentioning
confidence: 99%
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“…In spite of these physical instabilities of the bulk, the GeO 2 / Ge interface is still attractive because of its excellent electrical properties. 6 Researchers have developed a wide range of gate stack structures with a GeO 2 /Ge interface. One approach is to use thermal or plasma techniques such as nitridation to passivate a GeO 2 surface by forming a GeON layer on top of GeO 2 .…”
Section: Introductionmentioning
confidence: 99%
“…They include approaches with various types of interfacial layers such as Si [40,41], GeO 2 [42][43][44][45], oxynitrides [46][47][48][49], and different high-k dielectric materials [50][51][52]. Novel processes have been investigated, i.e.…”
Section: Gate Dielectricsmentioning
confidence: 99%