The Muller F element (4.2 Mb, ~80 protein-coding genes) is an unusual autosome of Drosophila melanogaster; it is mostly heterochromatic with a low recombination rate. To investigate how these properties impact the evolution of repeats and genes, we manually improved the sequence and annotated the genes on the D. erecta, D. mojavensis, and D. grimshawi F elements and euchromatic domains from the Muller D element. We find that F elements have greater transposon density (25–50%) than euchromatic reference regions (3–11%). Among the F elements, D. grimshawi has the lowest transposon density (particularly DINE-1: 2% vs. 11–27%). F element genes have larger coding spans, more coding exons, larger introns, and lower codon bias. Comparison of the Effective Number of Codons with the Codon Adaptation Index shows that, in contrast to the other species, codon bias in D. grimshawi F element genes can be attributed primarily to selection instead of mutational biases, suggesting that density and types of transposons affect the degree of local heterochromatin formation. F element genes have lower estimated DNA melting temperatures than D element genes, potentially facilitating transcription through heterochromatin. Most F element genes (~90%) have remained on that element, but the F element has smaller syntenic blocks than genome averages (3.4–3.6 vs. 8.4–8.8 genes per block), indicating greater rates of inversion despite lower rates of recombination. Overall, the F element has maintained characteristics that are distinct from other autosomes in the Drosophila lineage, illuminating the constraints imposed by a heterochromatic milieu.

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One of the severe issues of the downscaling of semiconductor devices is the threshold voltage reduction which significantly increases the leakage current. Thus, high threshold voltage (HVT) techniques are required to bring down the leakage hike for improved performances. In this paper, for the first time, we investigate the analog/RF and linearity performances of silicon (Si) FinFET by employing HVT techniques. Using well-calibrated TCAD models, to mitigate the leakage current, we analyzed the following approach to get HVT: 1) increasing channel doping (Nch′); 2) making drain-side underlap (Ldsu); 3) increasing gate length (Lg′). Two flavors of FinFETs viz Bulk and SOI (silicon-on-insulator) are suitably compared over their baseline counterpart, i.e., without HVTs. A thorough investigation of analog/RF metrics such as transconductance, output resistance, gate capacitance, cut-off frequency, gain-bandwidth, and transconductance-frequency product proves the eminence of Bulk-FinFET over its peer SOI-FinFET. In contrast, SOI-FinFET shows merits in intrinsic gain and linearity such as gm2, gm3, VIP2, VIP3, IIP3, IMD3, and 1-dB compression point. Thus, HVT techniques are worth analyzing for a FinFET architecture employed in analog/RF applications.

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Self-heating effect (SHE) is a severe issue in advanced nano-scaled devices such as stacked nanosheet field-effect transistors (NS-FET), which raises the device temperature (TD), that ultimately affects the key electrical characteristics, i.e., threshold voltage (VT), DIBL, subthreshold slope (SS), IOFF, ION, etc. SHE puts design constraints in the advanced CMOS logic devices and circuits. In this paper, we thoroughly investigated the impact of ambient temperature and interface thermal contact resistance induced-self heating effect in the NS-FET using extensive numerical simulations. The weak electron-phonon coupling, phonon scattering, and the ambient temperature-induced joule energy directly coupled with thermal contact resistance cause the SHE-induced thermal degradation, which increases the device temperature (TD) and affects the device reliability. The baseline NS-FET is well-calibrated with the experimental data and 3D quantum corrected drift-diffusion coupled hydrodynamic and thermodynamic transport models is used in our TCAD framework to estimate the impact of ambient temperature and interface thermal contact resistance on the device performance. Moreover, we also evaluate the SHE-induced performance comparison of NS-FET with conventional FinFET and found that thermal degradation in NS-FET potentially worsen the electrical characteristics. Thus, a detailed TCAD analysis shows that the ambient temperature and interface thermal contact resistances deteriorate the effective thermal resistance (Reff) and device performance metrics.

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