Investigation of ambient temperature and thermal contact resistance induced self-heating effects in nanosheet FET

Abstract

Self-heating effect (SHE) is a severe issue in advanced nano-scaled devices such as stacked nanosheet field-effect transistors (NS-FET), which raises the device temperature (TD), that ultimately affects the key electrical characteristics, i.e., threshold voltage (VT), DIBL, subthreshold slope (SS), IOFF, ION, etc. SHE puts design constraints in the advanced CMOS logic devices and circuits. In this paper, we thoroughly investigated the impact of ambient temperature and interface thermal contact resistance induced-self heating effect in the NS-FET using extensive numerical simulations. The weak electron-phonon coupling, phonon scattering, and the ambient temperature-induced joule energy directly coupled with thermal contact resistance cause the SHE-induced thermal degradation, which increases the device temperature (TD) and affects the device reliability. The baseline NS-FET is well-calibrated with the experimental data and 3D quantum corrected drift-diffusion coupled hydrodynamic and thermodynamic transport models is used in our TCAD framework to estimate the impact of ambient temperature and interface thermal contact resistance on the device performance. Moreover, we also evaluate the SHE-induced performance comparison of NS-FET with conventional FinFET and found that thermal degradation in NS-FET potentially worsen the electrical characteristics. Thus, a detailed TCAD analysis shows that the ambient temperature and interface thermal contact resistances deteriorate the effective thermal resistance (Reff) and device performance metrics.

Role of temperature on linearity and analog/RF performance merits of a negative capacitance FinFET

“…Thus, the mobility graph shows a declining slope towards the drain end due to the higher impact of the horizontal component at the drain side. Now, as we increase the temperature, the lattice scattering increases [18,21], reducing mobility, which can be explained using equation (4). Therefore, the combined effect of the temperature on both intrinsic (i.e.…”

“…FinFET-based logic devices offer enhanced gate electrostatic, which profoundly reduces the short channel effects and paves the path for improved performances and low power dissipation CMOS circuits over conventional MOSFETs [1][2][3][4]. However, the Boltzmann tyranny still put the fundamental constraint on a subthreshold swing (SS), i.e.…”

Self-Heating Effect in a MoS2 Field-Effect Transistor and Improved Heat Dissipation by the BN Capping Layer

“…With the continuous miniaturization of integrated circuits, high-density devices generate a significant amount of Joule heat during continuous operation. − Therefore, effectively dissipating excessive heat and ensuring stable operation within a safe temperature range is a critical challenge for modern semiconductor integrated circuits (ICs). − During the operation of the device, charge transport commonly occurs in the semiconductor bottom layer, which contacts the underlying oxide. − The Joule heat generated during the device operation process causes a typical negative differential resistance (NDR) effect, which degrades the electrical performance of the device, including saturation current, carrier mobility, power density, etc. − Therefore, addressing the question of how to enhance the heat dissipation of the device to achieve the intrinsic electrical performance of the channel material is of utmost importance. , …”

Leakage and Thermal Reliability Optimization of Stacked Nanosheet Field-Effect Transistors with SiC Layers

“…On the other hand, the channel of NSFET is surrounded by gate oxide, which makes it difficult to dissipate the heat generated in the channel, thereby increasing the lattice temperature [18,19]. The rising lattice temperature will aggravate the reliability issues, such as the bias temperature instability (BTI) effect, time-dependent dielectric breakdown (TDDB), and hot carrier injection (HCI) effect [20,21]. Therefore, improving the self-heating effect (SHE) in NSFETs is also a significant focus of current research [20,22,23].…”

“…The rising lattice temperature will aggravate the reliability issues, such as the bias temperature instability (BTI) effect, time-dependent dielectric breakdown (TDDB), and hot carrier injection (HCI) effect [20,21]. Therefore, improving the self-heating effect (SHE) in NSFETs is also a significant focus of current research [20,22,23]. The bottom oxide isolation structure mentioned above makes it difficult for heat to transfer from the channel to the substrate due to the lower thermal conductivity of SiO 2 compared to silicon, leading to a more profound SHE in NSFETs than conventional devices [24,25].…”