We have developed carbon nanotube (CNT) vias consisting of about 1000 tubes using thermal chemical vapor deposition (CVD) at a growth temperature of 450°C with cobalt catalysts, titanium carbide ohmic contacts, and tantalum barrier layers on copper wiring. The lowest resistance obtained was about 5 Ω/via. The total resistance of the CNT via was three orders of magnitude lower than that of one CNT, indicating that the current flows in parallel through about 1000 tubes. No degradation was observed for 100 hours at via current densities of 2×106 A/cm2, which is favorably compared with Cu vias.
Vertically aligned multiwalled carbon nanotubes (MWCNTs) were synthesized by remote plasma chemical vapor deposition at a low temperature of 390°C, which meets the requirement of the large scale integration (LSI) process. For wiring application, we measured the electrical properties of MWCNT-via structures with and without chemical mechanical polishing (CMP). The via resistances were reduced using inner shells of MWCNTs whose caps were opened due to CMP. The improved resistance after annealing at 400°C was 0.6Ω for 2μm vias. Our process is suitable for LSI because the temperature never exceeds the allowable temperature of 400°C in the Si LSI process.
We have succeeded in growing multiwall carbon nanotubes (MWNTs) with low-resistance ohmic contacts to titanium electrodes by hot-filament chemical vapor deposition (HF-CVD) using a nickel catalyst layer on a titanium electrode. The contact resistance of the sample with nickel/titanium electrodes was two orders of magnitude smaller than that of the sample with nickel catalyst electrodes without titanium. We assumed that the low-resistance ohmic contact was achieved by forming titanium carbide (TiC) during the growth at the MWNT/titanium electrode interface. Moreover, we have demonstrated the growth of vertically aligned bundles of MWNTs, which were end-bonded to the lower titanium electrodes, selectively in via holes. We believe this is the first report of such simultaneous formation of MWNTs and their end-bonded low-resistance ohmic contacts, and its first trial application to carbon nanotube (CNT) vias for future ULSI interconnects.
Thickness-controlled growth of few-layer and multi-layer graphene was performed at 650 °C by thermal chemical vapor deposition, and top-gated field effect transistors (FETs) were fabricated directly on a large SiO2/Si substrate without graphene-transfer processes. Graphene was synthesized on patterned Fe films. The iron was subsequently etched after both ends of the graphene were fixed by source and drain electrodes, leaving the graphene channels bridging the electrodes all over the substrate. Top-gated FETs were then made after covering the channels with HfO2. The fabricated devices exhibit ambipolar behavior and can sustain a high-density current. The growth mechanism of graphene was also investigated.
We report a synthesis of a closely packed multi-walled carbon nanotube (MWCNT) forest by a multi-step growth method, including a new approach to immobilize catalytic nanoparticles, using plasma-based chemical vapor deposition. The CNT packing density reaches one-half of the theoretical value, where the space of 30–40% is filled with MWCNTs. This value is approximately one order of magnitude larger than that of as-grown CNT forest synthesized using conventional methods. The method is applicable even at a spatially restricted region, for example, in trench or via hole, and is available at the growth temperature as low as 450 °C.
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