F. Jacquet scite author profile

An 8Mbit memory chip featuring a floating body one transistor cell on bulk substrate is characterized for the first time. A high-speed and high accuracy current sense-amplifier with a large common mode reference current is proposed. It achieves a reading time of 10ns and a current read margin lower than 5uA. A bit fail rate of 0.017% was measured on a 1Mbit module. Data retention shows that 1Tbulk cell concept has the potential to be used as a future eDRAM memory cell. Introduction:

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F. Jacquet

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