A one transistor cell on bulk substrate (1T-Bulk) for low-cost and high density eDRAM

Overview and future challenges of floating body RAM (FBRAM) technology for 32nm technology node and beyond

“…Some kinds of capacitor-less DRAM cell have been proposed and developed [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17]. Floating body cell (FBC) is a promising candidate in view of its simple structure and scalability.…”

1T-capacitorless bulk memory: Scalability and signal impact

“…Therefore, the margin between the two logic states is determined by the difference ∆Qb between Qb 0 for a "0" stored and Qb 1 for a "1" stored. Qb = Qg + Qs + Qd + Qniso (1) A static analytical model [3] has been developed to assess the ∆Vth variation (2), based on the variation in body voltage (∆Vb) due to stored charge Qb in the memory point. The model calculates the contributions to the total number of holes stored from the gate and the p-n junctions, as a function of the device geometry.…”

“…A 1-Transistor Floating Body (1TFB) memory, which principle was demonstrated on bulk silicon substrate [1] [2], offers a potential memory solution as technology continues to scale to ever smaller dimensions. The 1TFB memory provides a high-density dynamic memory solution that offers a possible embedded memory with a memory solution that requires minimum process impact.…”

Circuit Design for Bias Compatibility in Novel FinFET-Based Floating-Body RAM

“…FB-RAM cells were first realized using partially depleted [5] and fully depleted silicon-on-insulator (SOI) technologies [6]- [8]. The concept has also been demonstrated for devices fabricated on bulk silicon, where the FB is emulated using triple-well isolation [9]. Still, bulk silicon is cheaper than SOI, and FB-RAM is fully compatible with the standard CMOS processes, which makes the option attractive from a purely costprocessing cost perspective.…”