ESSDERC 2007 - 37th European Solid State Device Research Conference 2007
DOI: 10.1109/essderc.2007.4430945
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1T-capacitorless bulk memory: Scalability and signal impact

Abstract: The 1-transistor floating body (1TFB) memory presents a possible solution for embedded memories, as it appears to scale, and does so with standard processing. This study investigates the signal limits of 1TFB memory as technology scales. It shows that although the signal ∆Vth remains nearly constant with scaling, the memory cells become susceptible to disturbance because the amount of stored charge decreases. In addition, the transistor mismatch increases with scaling, thus limiting the ability of conventional… Show more

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Cited by 4 publications
(3 citation statements)
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“…To circumvent this, 1T-bulk DRAM cell, based on bulk substrate, has been proposed. [10][11][12][13] However, in the 1T-bulk cell array, a shallow-trench-isolation (STI) layer has to be used for lateral isolation, which leads to a larger cell area from 6 to 10 F 2 . Also improvement for sensing current and retention performance is still needed for 1T-bulk cell.…”
Section: Introductionmentioning
confidence: 99%
“…To circumvent this, 1T-bulk DRAM cell, based on bulk substrate, has been proposed. [10][11][12][13] However, in the 1T-bulk cell array, a shallow-trench-isolation (STI) layer has to be used for lateral isolation, which leads to a larger cell area from 6 to 10 F 2 . Also improvement for sensing current and retention performance is still needed for 1T-bulk cell.…”
Section: Introductionmentioning
confidence: 99%
“…This tT-DRAM is the most promising technology for embedded DRAM (eDRAM) because of its good scalability and simple structure without needing a complicated storage capacitor [4]. However, as the device size shrinks, the number of holes stored in the storage node is decreased [6] and the leakage currents of the PIN junctions between the body and the SID are increased. It is a serious problem for retention time [6][7][8].…”
Section: Introductionmentioning
confidence: 99%
“…However, as the device size shrinks, the number of holes stored in the storage node is decreased [6] and the leakage currents of the PIN junctions between the body and the SID are increased. It is a serious problem for retention time [6][7][8]. Based on the TCAD simulation, the novel 1T-DRAM with the block oxide embedded by the body is not only solves the leakage problem, but also enlarges the device's programming window owing to the hole density of the body are increased.…”
Section: Introductionmentioning
confidence: 99%