The design of mixed-signal ASICs for space requires a detailed knowledge of the behaviour of the technology to be used in an environment imposing radiation levels and temperatures beyond those found in standard applications. Commercial foundries providing standard CMOS technologies do not usually have or make available data on the behaviour of their devices under those conditions. Instituto de Microelectrónica de Sevilla and Universidad de Sevilla (IMSE-USE) have started a long term collaboration with the Spanish Instituto Nacional de Técnica Aeroespacial (INTA) to extend its experience on mixed-signal design to the field of ASICs for space applications. The assessment of a commercial (austriamicrosystems) 0.35µm CMOS technology is a first step towards the development of a mixed-signal design methodology, including the development of an RHBD digital library suitable for use in space conditions.
This paper presents an application-specific integrated circuit (ASIC) aimed for an alternative design of a digital 3-D magnetometer for space applications, with a significant reduction in mass and volume while maintaining a high sensitivity. The proposed system uses magnetic field sensors based on anisotropic magnetoresistances and a rad-hard mixed-signal ASIC designed in a standard 0.35 µm CMOS technology. The ASIC performs sensor-signal conditioning and analogue-to-digital conversion, and handles calibration tasks, system configuration, and communication with the outside. The proposed system provides high sensitivity to low magnetic fields, down to 3 nT, while offering a small and reliable solution under extreme environmental conditions in terms of radiation and temperature.Index Terms-Aerospace electronics, anisotropic magnetoresistance (AMR), CMOS mixed-signal application-specific integrated circuit (ASIC), magnetometer, radiation hardened by design (RHBD).
A multichannel high-resolution single-slope analogue-to-digital converter (SS ADC) is presented that automatically compensates for process, voltage and temperature variations, as well as for radiation effects, in order to be used in extreme environmental conditions. The design combines an efficient implementation by using a feedback loop that ensures an inherently monotonic and very accurate ramp generation, with high levels of configurability in terms of resolution and conversion rate, as well as input voltage range. The SS ADC was designed in a standard 0.35 µm CMOS technology. Experimental measurements of the performance and stability against radiation and temperature are presented to verify the proposed approach.Introduction: Single-slope analogue-to-digital converters (SS ADCs) are widely used in many multichannel data acquisition applications by implementing parallel readout architectures. The ramp generator is a key element in this conversion scheme, given the direct relationship between its performance and the ADC transfer characteristic. When medium to high resolutions are the aim, process, voltage and temperature (PVT) and ageing variations can limit the accuracy of the SS ADC. Moreover, in space environments, circuits are required to operate in an extended temperature range and also to deal with the total ionising dose (TID) radiation effects that degrade the DC and AC performance characteristics with a gradual change with time [1]. All of these effects can produce variations in the slope of the ramp, which critically affects the performance of the overall SS ADC. This is illustrated in Fig. 1.
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