This paper presents an application-specific integrated circuit (ASIC) aimed for an alternative design of a digital 3-D magnetometer for space applications, with a significant reduction in mass and volume while maintaining a high sensitivity. The proposed system uses magnetic field sensors based on anisotropic magnetoresistances and a rad-hard mixed-signal ASIC designed in a standard 0.35 µm CMOS technology. The ASIC performs sensor-signal conditioning and analogue-to-digital conversion, and handles calibration tasks, system configuration, and communication with the outside. The proposed system provides high sensitivity to low magnetic fields, down to 3 nT, while offering a small and reliable solution under extreme environmental conditions in terms of radiation and temperature.Index Terms-Aerospace electronics, anisotropic magnetoresistance (AMR), CMOS mixed-signal application-specific integrated circuit (ASIC), magnetometer, radiation hardened by design (RHBD).
A multichannel high-resolution single-slope analogue-to-digital converter (SS ADC) is presented that automatically compensates for process, voltage and temperature variations, as well as for radiation effects, in order to be used in extreme environmental conditions. The design combines an efficient implementation by using a feedback loop that ensures an inherently monotonic and very accurate ramp generation, with high levels of configurability in terms of resolution and conversion rate, as well as input voltage range. The SS ADC was designed in a standard 0.35 µm CMOS technology. Experimental measurements of the performance and stability against radiation and temperature are presented to verify the proposed approach.Introduction: Single-slope analogue-to-digital converters (SS ADCs) are widely used in many multichannel data acquisition applications by implementing parallel readout architectures. The ramp generator is a key element in this conversion scheme, given the direct relationship between its performance and the ADC transfer characteristic. When medium to high resolutions are the aim, process, voltage and temperature (PVT) and ageing variations can limit the accuracy of the SS ADC. Moreover, in space environments, circuits are required to operate in an extended temperature range and also to deal with the total ionising dose (TID) radiation effects that degrade the DC and AC performance characteristics with a gradual change with time [1]. All of these effects can produce variations in the slope of the ramp, which critically affects the performance of the overall SS ADC. This is illustrated in Fig. 1.
This paper reports a single-chip solution for the implementation of radiation-tolerant CMOS front-end electronics (FEE) for applications requiring the acquisition of base-band sensor signals. The FEE has been designed in a 0.35 µm CMOS process, and implements a set of parallel conversion channels with high levels of configurability to adapt the resolution, conversion rate, as well as the dynamic input range for the required application. Each conversion channel has been designed with a fully-differential implementation of a configurable-gain instrumentation amplifier, followed by an also configurable dual-slope ADC (DS ADC) up to 16 bits. The ASIC also incorporates precise thermal monitoring, sensor conditioning and error detection functionalities to ensure proper operation in extreme environments. Experimental results confirm that the proposed topologies, in conjunction with the applied radiation-hardening techniques, are reliable enough to be used without loss in the performance in environments with an extended temperature range (between-25 and 125 ºC) and a total dose beyond 300 krad. Index Terms-nuclear instrumentation and measurement; space applications; CMOS mixed-signal ASICs; front-end electronics; RHBD; dual-slope ADC.
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