Schottky Barrier Carbon Nanotube Transistor: Compact Modeling, Scaling Study, and Circuit Design Applications

Najari, Montassar; Fregonèse, Sébastien; Maneux, Cristell; Mnif, Hassène; Nouri, Mohammad; Zimmer, Thomas

doi:10.1109/ted.2010.2084351

Cited by 54 publications

(21 citation statements)

References 35 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…For comparison, we numerically calculate the total current I solving (9) with (4) and (8). The empty triangles relate to analytical drain current calculations within an energy independent effective SB approximation [27] at the tunneling distance dtun = 1.5 nm and V ds =0.1, 0.5, and 2 V.…”

Section: Resultsmentioning

confidence: 99%

“…The first reference model [17] is based on the numerical calculation of the Landauer integral taking into account electron multiple reflections between SBs located at the source and drain. The second reference model [27] is based on the energy independent effective SB approach and provides an analytical expression for the drain current. In this model, the tunneling distance d tun represents a fitting parameter.…”

Section: Resultsmentioning

confidence: 99%

See 1 more Smart Citation

Analytical Drain Current Model of 1-D Ballistic Schottky-Barrier Transistors

Bejenari

Schröter

Claus

2017

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

Abstract-A new analytical model based on the WKB approximation for MOSFET-like one-dimensional ballistic transistors with Schottky-Barrier contacts has been developed for the drain current. By using a proper approximation of both the FermiDirac distribution function and transmission probability, an analytical solution for the Landauer integral was obtained, which overcomes the limitations of existing models and extends their applicability toward high bias voltages needed for analog applications. The simulations of transfer and output characteristics are found to be in agreement with the experimental data for sub 10 nm CNTFETs.Index Terms-Carbon-nanotube field-effect transistor (CNT-FET), analytical transport model, Schottky barrier (SB), tunneling, Wentzel-Kramers-Brillouin (WKB) approximation.

show abstract

Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

Analytical Drain Current Model of 1-D Ballistic Schottky-Barrier Transistors

Bejenari

Schröter

Claus

2017

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

show abstract

“…A cutoff approximation is proposed in [29] and [30] and was shown to work with SB-type carbonnanotube (CNT) FET that is a 1-D carbon-based device like GNRFET. In the cutoff model, E SB is simplified into a rectangular shape of an effective height SB,eff and thickness d SB , as shown in Fig.…”

Section: Computation Complexity Reductionmentioning

confidence: 99%

Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis

Gholipour

Chen

Sangai

et al. 2016

IEEE Trans. VLSI Syst.

View full text Add to dashboard Cite

This paper presents an accurate analytical compact model for Schottky-barrier-type graphene nanoribbon field-effect transistors (SB-GNRFETs). This is a physics-based analytical model for the current-voltage (I-V ) characteristics of SB-GNRFETs. The proposed model considers various design parameters and process variation effects, including graphenespecific line-edge roughness, which allows thorough exploration and evaluation of SB-GNRFET circuits. We develop accurate approximations of SB tunneling, channel charge, and current, which provide accurate results while maintaining model compactness. We evaluate the effect of design parameters and process variations on the performance of SB-GNRFETs. We also compare circuit-level performance of SB-GNRFETs with multigate (MG) Si-CMOS (e.g., FinFETs). Our circuit simulations indicate that SB-GNRFET has an energy-delay product (EDP) advantage over Si-CMOS, although GNR-specific process variation, especially the line-edge roughness, would significantly downgrade such an advantage; the EDP of the ideal SB-GNRFET (assuming no process variation) is ∼2.5% of that of Si-CMOS, while the EDP of the nonideal case with process variation is ∼68% of that of Si-CMOS. Finally, we study technology scaling with SB-GNRFET and MG Si-CMOS. We show that the EDP of ideal (nonideal) SB-GNRFET is ∼0.88% (54%) EDP of that of Si-CMOS as the technology nodes scale down to 7 nm.Index Terms-Graphene nanoribbon field-effect transistor (GNRFET), nanoelectronics, Schottky barrier (SB), SPICE model.

show abstract

“…2a and b where the band is shifted due to surface potential. 20 Let V CNT be the CNT surface potential, then it will be responsible for the band shift in relation to gate bias. At no gate bias (V GS ), V CNT = 0 indicating that the channel is intrinsic without any shift.…”

Section: Modeling Approach For Sbcntfetmentioning

confidence: 99%

Circuit Compatible Model for Electrostatic Doped Schottky Barrier CNTFET

Singh

Khosla

Raj

2016

Journal of Elec Materi

View full text Add to dashboard Cite

This paper proposes a circuit compatible model for electrostatic doped Schottky barrier carbon nanotube field effect transistor (ED-SBCNTFET). The proposed model is an extension of the Schottky barrier carbon nanotube field effect transistor (SBCNTFET) to ED-SBCNTFET by adding polarity gates, which are used to create electrostatic doping. In ED-SBCNTFET, electrostatic doping is responsible for a fermi level shift of source and drain regions. A mathematical relation has been developed between fermi level shift and polarity gate bias. Both current-voltage (I-V) and capacitance-voltage (C-V) characteristics have been efficiently modeled. The results are compared with the reported semi-classical model and simulations from NanoTCAD ViDES for validation. The proposed model is much faster than numerical models as it denies self consistent equations. Finally, circuit application is demonstrated by simulating inverter using the proposed model in HSPICE.

show abstract

Schottky Barrier Carbon Nanotube Transistor: Compact Modeling, Scaling Study, and Circuit Design Applications

Cited by 54 publications

References 35 publications

Analytical Drain Current Model of 1-D Ballistic Schottky-Barrier Transistors

Analytical Drain Current Model of 1-D Ballistic Schottky-Barrier Transistors

Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis

Circuit Compatible Model for Electrostatic Doped Schottky Barrier CNTFET

Contact Info

Product

Resources

About