Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis

Abstract

This paper presents an accurate analytical compact model for Schottky-barrier-type graphene nanoribbon field-effect transistors (SB-GNRFETs). This is a physics-based analytical model for the current-voltage (I-V ) characteristics of SB-GNRFETs. The proposed model considers various design parameters and process variation effects, including graphenespecific line-edge roughness, which allows thorough exploration and evaluation of SB-GNRFET circuits. We develop accurate approximations of SB tunneling, channel charge, and current, which provide accurate results while maintaining model compactness. We evaluate the effect of design parameters and process variations on the performance of SB-GNRFETs. We also compare circuit-level performance of SB-GNRFETs with multigate (MG) Si-CMOS (e.g., FinFETs). Our circuit simulations indicate that SB-GNRFET has an energy-delay product (EDP) advantage over Si-CMOS, although GNR-specific process variation, especially the line-edge roughness, would significantly downgrade such an advantage; the EDP of the ideal SB-GNRFET (assuming no process variation) is ∼2.5% of that of Si-CMOS, while the EDP of the nonideal case with process variation is ∼68% of that of Si-CMOS. Finally, we study technology scaling with SB-GNRFET and MG Si-CMOS. We show that the EDP of ideal (nonideal) SB-GNRFET is ∼0.88% (54%) EDP of that of Si-CMOS as the technology nodes scale down to 7 nm.Index Terms-Graphene nanoribbon field-effect transistor (GNRFET), nanoelectronics, Schottky barrier (SB), SPICE model.

Schottky‐barrier graphene nanoribbon field‐effect transistors‐based field‐programmable gate array's configurable logic block and routing switch

“…The SB‐GNRFET was studied and the associated models for circuit simulations are in [14, 26]. This paper uses these models for simulations and evaluates the proposed devices with 0.5 V as nominal power supply voltage and temperature set to room temperature, i.e.…”

Review on graphene nanoribbon devices for logic applications

“…Chen and colleagues present a flexible SPICE-compatible model for Schottky barrier GNRFETs (SB-GNRFETs) that is more suitable for designing complex circuits since the model includes process variations in the parameters of the device, such as channel length, width, oxide thickness, and edge roughness [45]. The simulation model presented in [46] contains analytical approximations of carrier charge density and current for SPICE modeling, allowing I-V calculations for SB-GNRFETs with different channel width/ length, oxide thickness, temperature, and line-edge roughness variation effects. In [47], Kliros uses effective mass approximations and semi-classical ballistic transport to develop an analytical gate capacitance model that includes the effects of edge bond relaxation, third nearest neighbor interaction and thermal broadening.…”

Design of High-Performance 1-Bit Full Adder Cells Based on MOS-Type GNRFETs

“…However, graphene has received much attention because of its planar structure, so it does not need major technological shift [4]. Graphene is a single atomic layer of carbon film with two-dimensional honeycomb lattice, has no intrinsic bandgap and hence cannot be completely turned ON or OFF [5]. With tailoring the graphene to one-dimensional (1-D) graphene nanoribbons (GNRs) form with width less than 10 nm, a bandgap opens up and can be used as channel material [6].…”

“…With tailoring the graphene to one-dimensional (1-D) graphene nanoribbons (GNRs) form with width less than 10 nm, a bandgap opens up and can be used as channel material [6]. GNR field effect transistors (FETs) (GNRFETs) are potential substitution for silicon-based transistors due to faster switching, reduced short channel effects, lower energydelay product (EDP), and high I ON /I OFF ratio [5,7].…”