High-performance sub-0.08 μm CMOS with dual gate oxide and 9.7 ps inverter delay

Integrations and challenges of novel high-k gate stacks in advanced CMOS technology

“…In this plot the generations are defined by a critical device size, which is projected to decrease from 200 nm to 50 nm over the next 12 years. The predictions are based on extrapolations of published state-of-the-art 180 nm technologies assuming channel length, supply voltage, and gate oxide thickness scaling factors of 0.7, 0.8, and 0.8, respectively [21][22][23].…”

Reduced electron mobility due to nitrogen implant prior to the gate oxide growth

“…Although there are a number of different ways to introduce nitrogen into the gate oxide, a promising technique appears to be by implantation into Si before the gate oxide growth [2]. This technique, in addition, improves the thickness uniformity of the gate oxide, offers several other advantages, and has been shown to yield high performance, deep submicron devices for VLSI applications [3]- [5].…”

Design of 2xVDD-tolerant mixed-voltage I/O buffer against gate-oxide reliability and hot-carrier degradation

“…The I/O circuits of prior arts those attempted to avoid reliability problems due to gate-oxide overstress and hot-carrier degradation have been reported in [13,14] and [22][23][24][25][26]. To realize the I/O buffer with 1.8/3.3/5-V mix-voltage tolerance without gate-oxide reliability issue, one prior design implemented with 3.3-V devices in a 0.35-lm CMOS process was reported in [22].…”

“…To realize the I/O buffer with 1.8/3.3/5-V mix-voltage tolerance without gate-oxide reliability issue, one prior design implemented with 3.3-V devices in a 0.35-lm CMOS process was reported in [22]. Besides, the dualoxide (thick-oxide and thin-oxide) process [23][24][25] was also provided by foundry, that can be used to prevent the reliability anxiety in mixed-voltage interface against gate-oxide overstress and hotcarrier degradation. Two kinds of devices (such as 1-V and 2.5-V transistors) were also adapted to output 3.3-V signals without aforementioned reliability anxiety [26].…”