Functionality Demonstration of a High-Density 1.1V Self-Aligned Split-Gate NVM Cell Embedded into LP 40 nm CMOS for Automotive and Smart Card Applications

Shum, D.; Luo, Laiqiang; Chow, Yew Tuck; Zhang, F.; Tan, Juan Boon; Cai, X.S.; Teo, Ziqiang; Do, Nhan; Kim, J.H.; Ghazavi, P.; Tiwari, Vipin; Wang, D.X.; Lim, Kenneth Yang Teck; Zhou, B.B.; Liu, J.Q.; Yeo, Anders; Chang, T.L.; Kong, Yachen; Yap, C.W.; Lup, S.; Long, Rathnait D.

doi:10.1109/imw.2015.7150288

Cited by 2 publications

(1 citation statement)

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“…The Flash programming scheme has been adapted to satisfy the new constraints imposed by the smart connected object application field, to remain competitive with respect to the new devices, very aggressive in terms of energy consumption and scaling [8,9]. Last but not least, the cell architecture has been modified in a 2T memory and split gate (1.5T) [10][11][12] or even, using a FD-SOI technology [13]. This kind of improvements can decrease the cell energy consumption and leakages, in order to address the ultra-low power applications.…”

Section: Introductionmentioning

confidence: 99%

Quantitative correlation between Flash and equivalent transistor for endurance electrical parameters extraction

Marca

Postel-Pellerin

Kempf

et al. 2018

Microelectronics Reliability

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Nowadays, the study of physical mechanisms that occur during Flash memory cell life is mandatory when reaching the 40nm and beyond nodes in terms of reliability. In this paper we carry out a complete experimental method to extract the floating gate potential evolution during the cell aging. The dynamic current consumption during a Channel Hot Electron operation for a NOR Flash is a proper quantitative marker of the cell degradation. Here both drain and bulk currents are measured and monitored throughout the endurance tests. We coupled these characteristics with quasi-static measurements to correlate the cell degradation with an equivalent transistor. The final goal is to be able to split the physical effects of repetitive hot carrier and Fowler-Nordheim operations, typical of Flash memories, to extract the electrical parameters evolution on a simple equivalent transistor.

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