A novel True Random Number Generator circuit fabricated in a 130nm HfO2-based resistive RAM process is presented. The generation of the random bit stream is based on a specific programming sequence applied to a dedicated memory array. In the proposed programming scheme, all the cells of the memory array are addressed at the same time while the current provided to the circuit is limited to program only a subset of the memory array, resulting in a stochastic distribution of cell resistance values. Some cells are switched in a low resistive state, other cells are slightly programmed to reach an intermediate resistance state, while the remaining cells maintain their initial high resistance state. Resistance values are next converted into a bit stream and confronted to National Institute of Standards and Technology (NIST) test benchmarks. The generated random bit stream has successfully passed twelve NIST tests out of fifteen. Compared to state-of-the-art resistive RAM-based true random number generators, our proposed methodology is the first one to leverage on programming current limitation at a memory array level.

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We demonstrate that infrared femtosecond laser pulses with intensity above two-photon ionization threshold of crystalline silicon (c-Si) induce charge transport through the tunnel oxide in floating gate Metal-Oxide-Semiconductor (MOS) transistor devices. With repeated irradiations of Flash memory cells, we show how the laser-produced free-electrons naturally redistribute on both sides of the tunnel oxide until the electric field of the transistor is suppressed. This ability enables to determine in a nondestructive, rapid and contactless way the flat band and the neutral threshold voltages of the tested device. The physical mechanisms including nonlinear ionization, quantum tunneling of free-carriers, and flattening of the band diagram are discussed for interpreting the experiments. The possibility to control the carriers in memory transistors with ultrashort pulses holds promises for fast and remote device analyses (reliability, security, defectivity) and for new developments in the growing field of ultrafast microelectronics.

In this paper a new experimental technique for measuring the switching dynamics and extracting the energy consumption of Spin Transfer Torque MRAM (STT-MRAM) device is presented. This technique is performed by a real-time current reading while a pulsed bias is applied. The switching from a high resistive state, anti-parallel (AP) alignment, to a low resistive state, parallel (P) alignment, is investigated as well as the impact of the cell diameter on the switching parameters. We demonstrate that preswitching and switching times and energies have a log-linear relationship with the applied voltage. Increasing the applied voltage leads to a higher spin torque on the free layer in a shorter time. This decreases the time needed to change the magnetization orientation of this layer, thus the time required before the switching occurs. We have also shown that for a given applied voltage, the smaller the cell the longer the time before switching. For low applied voltages, the preswitching time increases exponentially dominating the whole reversal time. The longer switching times can be explained by a lower Joule heating not sufficient to induce the thermally activated reversal process. This phenomenon is accentuated for smaller cells, where the heating is more significant and the time before switching is shorter than for larger cells.

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In this paper, the performance and reliability of oxide-based