An easy-to-use mismatch model for the MOS transistor

Croon, J.A.; Rosmeulen, M.; Decoutere, Stefaan; Sansen, Willy; Maes, H.E.

doi:10.1109/jssc.2002.800953

Cited by 117 publications

(73 citation statements)

References 15 publications

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“…Namely, the increase in integrity narrows the operating range of LSI circuits by increasing the ranges of device-characteristic distributions, 3 while the scaled-down devices themselves encounter a larger variation in their characteristics. [4][5][6][7][8] Accordingly, a considerable number of LSI engineers are currently devoted to variation-tolerant circuit designs or to technologies for reducing the variations.…”

Section: Introductionmentioning

confidence: 99%

Spectral analysis of line edge and line-width roughness with long-range correlation

Hiraiwa

Nishida

2010

Journal of Applied Physics

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Large-scale integrations (LSIs) are facing an ever-growing problem of device variability. One of the origins that cause the variability is line-width roughness (LWR) caused by line edge roughness (LER). Accurate characterization of the LWR plays an essential role in controlling the LWR. To do this, we report a methodology, named the “assembly method,” that enables to analyze LWR statistics beyond the conventional correlation length limit, basing on the previous “patchwork” method and recent discrete power spectral density (PSD) method. The methodology virtually assembles a long line by gathering line segments that are randomly scattered on a single line or equally processed different lines. The virtual lines are repeatedly assembled by randomly changing the combination of the segments and the order of the gathered segments while permitting overlaps of the segments between the assembled lines. Squared Fourier transforms of their widths are averaged over the assembled lines to obtain the PSD. By these steps, the statistical noise, which is inherent to experimental PSDs, is markedly reduced. Furthermore, to extract LWR statistics by comparing experimental and theoretical PSDs, we derived an analytic formula of the assembled-line PSD. In the derivation, the randomness of the segment collections played a key role. The PSDs calculated using the formula almost completely fitted experimental PSDs that were obtained by the assembly method. The parameters used in the best-fitted calculation revealed that the photoresist LWR of this study contained a component that had a correlation length of 2780 nm in addition to the previously reported LWR of 35 nm. The LWR variance of the component accounted for approximately 10% of the total variance. The formula also enabled us to evaluate the accuracy of experimentally obtained averages of widths. We find two distinct features in the PSDs by the assembly method. One is the oscillatory structure that shows up in the case when the correlation length is larger than half the length of the segments. A trace of this structure was actually observed in the experimental PSDs of this study. The other is the spikes that are periodically observed as a function of wave number. The spikes originate from a nonstochastic width variation that exists in all the segments in common. Their intensity is proportional to the number of gathered segments in the assembled lines. Because the spikes are excluded from the analysis, the LWR parameters determined by the assembly method are not affected by the nonstochastic variation, unlike the conventional methods. By all these results, we confirm that the assembly method of this study extends the upper limit of analyzable correlation lengths by a factor of approximately 20 and enhances the accuracy as well. This feature also has a practical significance that the widely observed LWR with a correlation length of approximately 35 nm can be analyzed by the assembly method using a conventional critical-dimension scanning-electron-microscope, without resorting to a specially designed one. Accordingly, the method will be a key tool for investigating LER and LWR in developing and manufacturing LSIs. It will also help analyze other stochastic processes in many research and development settings.

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Section: Introductionmentioning

confidence: 99%

Spectral analysis of line edge and line-width roughness with long-range correlation

Hiraiwa

Nishida

2010

Journal of Applied Physics

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“…Impact of variability at transistor level can be reflected in a drift in the drain current (I D ) from its nominal value. A first order approximation shows that, variations in the drain current are linearly related to variations in the current factor (β) and the threshold voltage (V t ) [8]. The current factor (β) depends on several physical parameters:…”

Section: Stochastic Model For Variabilitymentioning

confidence: 99%

Systematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules

Wang

Miranda

Dehaene

et al.

Design, Automation and Test in Europe

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“…Equation (4) has been derived for a generic transistor M bi ; considering that [6,7] and summing (4) for all the series (6) is not exact, it has been approximated supposing infinite differential-length series transistors, and the integration procedure and approximations presented in [7]. An equation equivalent to (6) can be derived for ∆β i variations in series transistors.…”

Section: Current Mirror Topology and Mismatchmentioning

confidence: 99%

“…For the sake of simplicity, only variations in V T and β -as in (1)-will be considered in this paper. Nevertheless the analysis can be extended to other models to study the mismatch in CMOS transistors [1][2][3][4], or to obtain more accurate expressions for 2 T V σ , 2 β σ , considering, for example, the mismatch dependence on the distance between transistors [1,2]. In analog design, it is common to express mismatch in terms of ∆V T , ∆β, the difference between V T , β, of two matched transistors.…”

Section: Introductionmentioning

confidence: 99%

Series-parallel association of transistors for the reduction of random offset in non-unity gain current mirrors

Fiorelli

Arnaud

Galup-Montoro

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

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An easy-to-use mismatch model for the MOS transistor

Cited by 117 publications

References 15 publications

Spectral analysis of line edge and line-width roughness with long-range correlation

Spectral analysis of line edge and line-width roughness with long-range correlation

Systematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules

Series-parallel association of transistors for the reduction of random offset in non-unity gain current mirrors

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