The monolithic hetero-integration of III/V materials on Si substrates could enable a multitude of new device applications and functionalities which would benefit from both the excellent optoelectronic properties of III/V compound materials and the well-established and highly mature Si manufacturing technologies. Due to the lattice mismatch between most III/V compound semiconductors and Si substrates, monolithic growth inevitably leads to the formation of strain releasing defects which degrade the final device performance and reliability. This review paper provides an overview of current approaches and methods to control the defect formation in monolithic III/V hetero-epitaxy on (001) Si substrates. The focus is on understanding the mechanisms of defect nucleation, manipulation and confinement in order to eventually realize active III/V device layers on Si substrates with high crystalline quality. For details about device applications numerous references are listed. Although many different integration approaches are discussed in the literature, there are two main concepts for the hetero-epitaxial growth of III/V material on Si: growth on blanket Si wafers and selective area growth on patterned Si substrates. Both methods have their advantages and disadvantages with respect to defect control and could potentially enable the integration of different III/V devices on a Si platform.

In 0.53 Ga 0.47 As p + n diodes with different densities of extended defects have been analyzed by detailed structural and electrical characterization. The defects have been introduced during Metal-Organic Vapor Phase Epitaxy (MOVPE) growth by using a lattice-mismatched layer on a semi-insulating InP or GaAs substrate. The residual strain and indium content in the n-type In 0.53 Ga 0.47 As layer have been determined by high-resolution X-ray diffraction, showing nearly zero strain and a fixed indium ratio of 0.53. The deep levels in the layer have been characterized by Deep Level Transient Spectroscopy. The mean value of electron traps at 0.17 ± 0.03 eV below the conduction band minimum E C is assigned to the "localized" states of α 60°misfit dislocations; another broad electron trap with mean activation energies between E C − 0.17 ± 0.01 and 0.39 ± 0.04 eV, is identified as threading dislocation segments with "band-like" states. A high variation of the pre-exponential factor K T by 7 orders of magnitude is found for the latter when changing the filling pulse time, which can be explained by the coexistence of acceptor-like and donor-like states in the core of split dislocations in III-V materials. Furthermore, two hole traps at E V + 0.42 ± 0.01 and E V + 0.26 ± 0.13 eV are related to the double acceptor of the Ga(In) vacancy (V Ga/In 3-/2-) and 60°β misfit dislocations, respectively. Finally, the dislocation climbing mechanism and the evolution of the antisite defects As Ga/In are discussed for n-type In 0.53 Ga 0.47 As.

We present a comprehensive study of Positive Bias Temperature Instability (PBTI) in In 0.53 Ga 0.47 As devices with Al 2 O 3 gate oxide, and with varying thickness of the channel quantum well. We show significant instability of the device electrical parameters induced by electron trapping into a wide distribution of defects in the high-k layer, with energy levels just above the InGaAs conduction band. A significant PBTI dependence on the channel thickness is found and ascribed to quantization effects. We argue that, in order to be relevant for production, the superior transport properties of III-V channels will need to be demonstrated with more stable high-k gate stacks.

Thin epitaxial GaAs films, with thickness varying from 140 to 1000 nm and different Si doping levels, were grown at 650°C by organometallic vapor phase epitaxy (OMVPE) on Ge substrates and analyzed by low-temperature photoluminescence (PL) spectroscopy. All spectra of thin GaAs on Ge show two different structures, one narrow band-to-band (B2B) structure at an energy of ~1.5 eV and a broad inner-bandgap (IB) structure at an energy of ~1.1 eV. Small strain in the thin GaAs films causes the B2B structure to be separated into a light-hole and a heavy-hole peak. At 2.5 K the good structural quality of the thin GaAs films on Ge can be observed from the narrow excitonic peaks. Peak widths of less than 1 meV are measured. GaAs films with thickness smaller than 200 nm show B2B PL spectra with characteristics of an n-type doping level of approximately 10 18 atoms/cm 3 . This is caused by heavy Ge diffusion from the substrate into the GaAs at the heterointerface between the two materials. The IB structure observed in all films consists of two gaussian peaks with energies of 1.04 eV and 1.17 eV. These deep trapping states arise from Ge-based complexes formed within the GaAs at the Ge-GaAs heterointerface, due to strong diffusion of Ge atoms into the GaAs. Because of similarities with Si-based complexes, the peak at 1.04 eV was identified to be due to a Ge Ga -Ge As complex, whereas the peak at 1.17 eV was attributed to the Ge Ga -V Ga complex. The intensity of the IB structure decreases strongly as the GaAs film thickness is increased. PL intensity of undoped GaAs films containing anti phase domains (APDs) is four orders of magnitude lower than for similar films without APDs. This reduction in intensity is due to the electrically active Ga-Ga and As-As bonds at the boundaries between the different APDs. When the Si-doping level is increased, the PL intensity of the APD-containing films is increased again as well. A film containing APDs with a Si doping level of ~10 18 atoms/cm 3 has only a factor 10 reduced intensity. We tentatively explain this observation by Si or Ge clustering at anti phase boundaries, which eliminates the effects of the Ga-Ga and As-As bonds. This assumption is confirmed by the fact that, at 77 K, the ratio between the intensity of the IB peak at 1.17 eV to the intensity of the peak at 1.04 eV is smaller than 1.4 for all films containing APDs, whereas it is larger than 1.4 for all films without APDs. This shows stronger clustering of Si or Ge in the material with APDs. For future electronic applications, Ge diffusion into the GaAs will have to be reduced. PL analysis will be a rapid tool for studying the Ge diffusion into the GaAs thin films.

We report on a new integration approach of III/V nano ridges on patterned Silicon (Si) wafers by metal organic vapor phase epitaxy (MOVPE). Trenches of different width (≤ 500nm) were processed in a silicon oxide (SiO2) layer on top of a 300 mm (001) Si substrate. MOVPE growth conditions were chosen in a way to guarantee an efficient defect trapping within narrow trenches and to form a box shaped ridge with increased III/V volume when growing out of the trench. Compressively strained InGaAs/GaAs multi-quantum wells (MQWs) with 19 % Indium were deposited on top of the fully relaxed GaAs ridges as an active material for optical application. Transmission electron microcopy (TEM) investigation shows that very flat QW interfaces were realized. A clear defect trapping inside the trenches is observed whereas the ridge material is free of threading dislocations with only a very low density of planar defects. Pronounced QW photoluminescence (PL) is detected from different ridge sizes at room temperature. The potential of these III/V nano ridges for laser integration on Si substrates is emphasized by the achieved ridge volume which could enable wave guidance and by the high crystal quality in line with the distinct PL. Quantum dot laser is a promising approach, as it seems to degrade less rapidly under the presence of non-radiative defects [18] [19]. Hetero-epitaxial growth of GaNAsP/GaBP based laser diode lattice matched on Si circumvents the formation of misfit dislocation (MD) but bears new challenges due to the complexity of the involved new material systems such as dilute nitrides