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Scaled bipolar transistors for bipolar complementary metal oxide semiconductor (BiCMOS) integrated circuits require low collector-substrate capacitance in order to minimize power consumption. The unintentional incorporation of dopant into a growing epitaxial layer, known as autodoping, can affect the ultimate lower limit of the collector-substrate capacitance. In this work, we studied the effects of epitaxial layer growth rate, arsenic-buried layer implant dose, and pre-epitaxia] bake temperature on autodoping using rapid thermal epitaxy (RTE). To begin, we experimented with the buried layer implant dose to check its affect on lateral autodoping. The amount of autodoping increased when the buried layer implant dose increased, confirming the source of the arsenic autodoping as the buried layer. Also, in contrast to data from conventional reactors, we found the peak interface concentration and integrated dose in regions adjacent to the buried layer to be linearly dependent on the growth rate (i.e., low growth rates trap less arsenic at the substrate/epi layer interface) for all growth rates studied. Next, by adjusting the prebake temperature over a range from 800 to I050~ without changing the growth conditions, we first observed a rise in autodoping with temperature to 950~ at which point the incorporated autodoping dose and peak concentration began to fall. Through simulation of the evaporated arsenic from the buried layer and data for arsenic desorption from the silicon surface, we explain this behavior. Finally, using the data gathered on the autodoping characteristics of RTE, we show a process using two growth rate steps and a low temperature prebake step which completely eliminates the lateral autodoping peak. Using this new growth process, epitaxial silicon films over arsenic-doped buried layers for low power BiCMOS are possible.

An ion milling system was used to implant low energy ni'trogen into an Si surface. The material composition and Si-N bonding of the film after various annealing conditions were investigated using grazing angle backscattering and infrared transmission spectroscopy. The ratio of Si to N was about 1 in the as-implanted films. After thermal annealing, the film composition changed and approached that of a stoichiometric nitride. Oxidation resistance of the film in wet and dry ambients was studied. Examination of the LOCOS profile revealed a marked decrease in the lateral oxidation as compared to the conventional process. The film exhibited insulating characteristics after 4 hr annealing at 900~ in nitrogen. beam irradiation, Rutherford backscattering. ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 130.102.42.98 Downloaded on 2015-03-13 to IP Vol. 129, No. 2 NITROGEN IMPLANTATION INTO SILICON 409 ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 130.102.42.98 Downloaded on 2015-03-13 to IP

This paper reports on silicon nitride formation by low energy implantation of nitrogen or ammonia into silicon. Extensive material investigation on nitrogen-implanted films using various analytical methods, including ellipsometry, chemical etching, transmission electron microscopy (TEM), x-ray photoelectron microscopy (XPS), infrared transmission spectroscopy (IR), and Rutherford backscattering spectroscopy (RBS) is discussed. A new technique to derive the film thickness, density, refractive index, and dielectric constant is developed. This method employs a combination of ellipsometry, capacitance measurement, and nitrogen areal density obtained by RBS. A major finding indicates that the implanted nitride films have a low density compared to CVD nitride. Other material properties are also summarized.Thermal nitridation and nitridation of oxide have been shown to have certain advantages over thermal oxidation (1-3). The thin dielectric obtained is very uniform and exhibits high breakdown strength. In addition, the nitrided layer has a higher dielectric constant than oxide and is impervious to impurity diffusion. The film is also less susceptible to process-induced gate failures (3). With the scaling of the gate dielectric in VLSI, thin nitride is a potential candidate to be investigated.We have shown that thin nitride can be formed by using low energy implantation of N2 in an ion milling machine (4). Since the ion milling machine can deliver a high current density over a large area, the through-put of this process is comparable with single-wafer processing. The implantation of N2 is accompanied by surface sputtering. The sputter-implantation process produces a very uniform layer. Rutherford backseattering spectroscopy (RBS) indicates that the total nitrogen incorporated into the Si surface is about 3.2 -3.5 • 1018 cm -2 at 1.7 keV. The as-implanted layer has a N/Si ratio of 1. A damaged layer about 3 -4 nm thick at the interface extending into the Si substrate is also present. After thermal treatment, the ratio approaches the stoichiometric nitride value of 1.3. The damage to the Si substrate is reduced but not totally removed after annealing at 900~ for 1/2h. A damaged layer about 0.8 nm thick remains. Transmission infrared spectroscopy shows the existence of N-Si bonding in both the as-implanted and the annealed samples. However, the transmission minimum shifts from about 850 to 800 cm -I after heat-treatment. ExperimentsThe substrates used in the studies were (100)-oriented silicon wafers. The native oxide is removed before loading into an ion milling machine (Veeco Microetch System). The system is first pumped down to below 2 • 10 -6 torr and then the implantation is carried out with nitrogen or ammonia at a pressure of 8 • 10 -5 torr. The total dose of the implant is always greater than 0.3 C/cm ~. The samples are then annealed in dry nitrogen or oxidized in wet oxygen. Results Ellipsometry measurements.--Ellipsometry is oftenused to obtain the thickness and the refractive index of a dielectric layer independ...

Eine neue Methode zur Herstellung von Si3N4‐Filmen beruht auf der Implantation niederenergetischer Stickstoffionen (ionmilling‐Apparatur) in eine Si‐Oberfläche.

We report a new SVSiGe HBT device structure using selective and non-selective rapid thermal epitaxy. The structure has the potential to simultaneously provide for high level integration and a high Ge fraction strained alloy base which allows high base doping. We used an in-situ As doped polysilicon emitter contact to provide low RE (9 to 12 for AE = 0.5 x 10 pm2) without the enhanced diffusion effects associated with direct implantation or phosphorous doped poly emitters, In addition, we studied the effects of the extrinsic base implant position on the device I-V characteristics, junction capacitances, and high frequency performance. The collector current increased by over 3 decades as the extrinsic base implant position moved from the single crystal region to an adjacent poly region due to the containment of damage. Sparameter measurements of a 0.5 x 10 pm2 device yielded a cutoff frequency of 54 GHz for VCE = 1.5 V and IC = 14.8 mA.

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