Cloud computing provides a way to coordinate and share relevant information and data on real-time basis over an organization. The adoption of cloud services is one of the most emerging technological advances in the practice of current competitive business environment. The research done in this article is based on the analysis of the data obtained from the semiconductor sector. Cloud adoption would most likely be the best answer for them. However, because of various types of complexities, semiconductor industries may have to confront with a few trust issues while receiving cloud services. This article aims to identify the trust factors in the adoption of cloud services in semiconductor industries. Further, the moderating effect of these trust elements related to the technological, organizational, and environmental success factors has been discussed here. On the basis of literature survey, a hypothetical model has been developed, and the relationships among the latent variables have been studied by using structural equations. The study reveals that while trust factors moderate the technology and environment-related success factors, there is not much moderating effect of the trust issues on the organization-related success factors in the adoption of cloud services in semiconductor industries.
Gate dielectric materials play a key role in device development and study for various applications. We illustrate herein the impact of hetero (high-k/low-k) gate dielectric materials on the ON-current (I ON ) and OFF-current (I OFF ) of the heterogate junctionless tunnel field-effect transistor (FET). The heterogate concept enables a wide range of gate materials for device study. This concept is derived from the well-known continuity of the displacement vector at the interface between low-and high-k gate dielectric materials. Application of high-k gate dielectric material improves the internal electric field in the device, resulting in lower tunneling width with high I ON and low I OFF current. The impact of work function variations and doping on device performance is also comprehensively investigated.
For the first time, we investigate the temperature effect on AlGaAs/Si based hetero-structure junctionless double gate tunnel field effect transistor. Since junctionless tunnel FET is an alternative substitute device for ultra scaled deep-submicron CMOS technology, having very good device characteristics such as an improved subthreshold slope (< 60 mV/decade at 300 K) and very small static leakage currents. The improved subthreshold slope and static leakage current confirms that it will be helpful for the development of future low power switching circuits. The 2-D computer based simulation results show that OFF-state leakage current is almost temperature independent for the proposed device structure.
In this paper, we present improved device characteristics of a Junctionless Tunnel Field Effect Transistor (JLTFET) with a Si and SiGe heterostructure.
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