Damage-less full molecular-pore-stack SiOCH (MPS) / Cu interconnect is developed to reduce effective k-value (k eff ).MPS with high endurance against plasma processes is introduced into both via and trench dielectrics without hard mask (HM). Low friction slurry and chemical modification of MPS surface by He-plasma treatment suppress defect generation during direct CMP of the MPS surface. The full-MPS interconnect with low-k (k=3.1) cap demonstrates 10% lower inter-line capacitance and 34% lower inter-layer capacitance than the full-SiOCH (k=3.0) interconnect with SiCN-cap (k=4.9). The effective k-value k eff reduces to 2.67 for the damage-less full MPS structure which is applicable to 32nm LSIs and beyond.

No abstract

No abstract

High performance Cu dual-damascene (DD) interconnects without process-induced damages are developed in porous SiOCH stacks with the effective dielectric constant ( e ) of 2.95, in which a carbon (C)-rich molecular-pore-stacking (MPS) SiOCH film ( = 2 5) is stacked directly on an oxygen (O)-rich porous SiOCH ( = 2 7) film. The novel etch-stopperless structure is obtained by comprehensive chemistry design of C/O ratios in the SiOCH stack and the etching plasma of an Ar N 2 CF 4 O 2 gas mixture technique. Large hydrocarbons attached to hexagonal silica backbones in the MPS-SiOCH prevent the Si-CHx bonds from oxidation during O 2 -plasma ashing, suppressing the C-depleted damage area at the DD sidewall. Combining multiresist mask process with immersion ArF photolithography, strictly controlled Cu DD interconnects with 180-nm pitched lines and 65-nm-diameter vias are obtained successfully, ready for the 300-mm fabrication.

No abstract