2007
DOI: 10.1109/jssc.2007.891665
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MRAM Cell Technology for Over 500-MHz SoC

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Cited by 50 publications
(20 citation statements)
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“…The unit cell consists of two transistors and one MTJ device, namely a 2T1MTJ structure. 50) A word line is connected to the gate of the transistors and two write bit lines are connected to the source=drain. The other source=drain is connected to the recording part of the MTJ device.…”
Section: Three-terminal Spintronics Devicesmentioning
confidence: 99%
“…The unit cell consists of two transistors and one MTJ device, namely a 2T1MTJ structure. 50) A word line is connected to the gate of the transistors and two write bit lines are connected to the source=drain. The other source=drain is connected to the recording part of the MTJ device.…”
Section: Three-terminal Spintronics Devicesmentioning
confidence: 99%
“…It is useful because it can function at low voltages and has a lifetime of over 10 16 write cycles [2]. In addition, making STT-MRAM suitable for use in high-density products [3], [4], [5], [6], [7]. STT-MRAM uses magnetic tunnel junction (MTJ) device.…”
Section: Introductionmentioning
confidence: 99%
“…Parkin et al proposed the sequential access memory, which is so-called the magnetic race track memory, based on the currentdriven domain wall motion [8]. Other applications of current-driven domain wall motion to logic [9] and memory [10] devices have been also presented. These application requires to overcome the large drive current.…”
Section: Introductionmentioning
confidence: 99%