1 1 Abstract-This paper describes a high temperature voltage comparator and an operational amplifier in a 1.2 µm silicon carbide CMOS process. These circuits are used as building blocks for designing a high temperature SiC low-side over current protection circuit. The over current protection circuit is used in the protection circuitry of a SiC FET gate driver in power converter applications. The op amp and the comparator have been tested at 400 °C and 550 °C temperature respectively. The op amp has an input common-mode range of 0-11.2 V, DC gain of 60 dB, unity gain bandwidth of 2.3 MHz and a phase margin of 48° at 400 °C. The comparator has a rise time and a fall time of 38 ns and 24 ns, respectively, at 550 °C. The over current protection circuit, implemented with these analog building blocks, is designed to sense a voltage across a sense resistor up to 0.5 V. Keywords-comparator, op amp, current sensor, silicon carbide, high temperature electronics, wide bandgap ICs. I.K. Addington is with the

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Electronic systems capable of withstanding high temperature environments are in high demand in various applications such as logging-while-drilling (LWD) systems and embedded electronics which are in the core of gas turbine engine controls. Designing memory that can process massive amounts of data in harsh environments while consuming low power opens doors for next generation, smart, high temperature electronic systems. In this work, a CMOS based six transistor (6T) static random-access memory (SRAM) cell is designed and implemented in a state-of-the-art SiC 1μm triple well CMOS process. The designed SiC SRAM cell performance has been characterized for different values of cell ratios (CR) [0.5, 0.6, 1, 1.5, 2, 2.5] and pull-up ratios (PR) [1, 2, 3, 4, 5, 6] to determine the cell size with optimal performance parameters. Static noise margin (SNM) values for the different combinations of CR and PR are calculated using the model developed by Seevinck, et. al. [13]. The highest SNM values observed at 25°C and 300°C are 4.71 V and 4.65 V, respectively. Read static noise margin (RSNM) values of 1.94 V and 1.90 V are achieved at 25°C and 300°C, respectively. Analysis of measured data shows that the optimum cell size is with a CR of 2.5 and a PR of 6. However, these results are significantly impacted by highly resistive ohmic contacts.

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