Electron beam (EB) direct writing systems have often been used for fabricating sub-half-micron advanced devices because EB direct writing is the most practical method for making the required patterns. Recently, the cell projection (CP) method has become indispensable for increasing the writing throughput in the EB direct writing system. However, it is considered that resist heating may be seriously aggravated below the quarter-micron level when the CP method is used, because the total deposited energy, which is irradiated by one CP EB shot, is almost the same as that irradiated by one variably shaped (VS) EB maximum size shot. Resist heating in the case of the CP method is calculated by a finite element method using the ANSYS (Ver. 5.0A: ANSYS, Inc.) program. In particular, thermal diffusion calculation is mainly carried out under the conditions of 50 kV acceleration voltage and 10 A/cm2 current density for practical application to advanced device fabrication. The calculated results suggest that resist heating in the CP method is mainly caused by the horizontal thermal flux between plural EB shots within the area of one CP shot, by the same mechanism as proximity resist heating under the VS method. Therefore, CP EB writing causes horizontal-mode resist heating. In particular, when a low current density is used, this resist heating mode arises significantly. However, CP writing with high acceleration voltage causes a reduction in the rise of the resist temperature, which causes resist heating. When the EB irradiation time is longer than 1.0 µ s under practical EB writing conditions, the resist temperature increases proportionally to the decrease of writing pattern size in the case of the CP writing with a maximum shot size of 5.0×5.0 µ m. It is also shown that the larger the beam blur of an incident beam, the more serious is the resist heating. When a highly sensitive resist (10 µ C/cm2) is used under these practical conditions, however, resist heating in the CP method is prevented without writing throughput degradation regardless of the CP maximum shot size, because the resist temperature does not rise above the thermal denaturation temperature of standard EB resists. Accordingly, the maximum CP shot size, which affects the writing throughput, is determined by the proximity effect and the Coulomb interaction for fine pattern fabrication.
This paper describes 0.15 µ m electron beam (EB) direct writing techniques for Gbit dynamic random access memory (DRAM) fabrication. In order to use EB direct writing for reliable fine pattern fabrication on the 0.15 µ m level, an EB direct writing system technique, a resist process technique, a cell projection (CP) mask preparation technique, which is indispensable for improving the writing throughput, and a data preparation technique with proximity effect correction must be improved respectively and combined successfully. The proximity effect correction for all fine patterns in a full-scale DRAM chip is especially important for achieving a CD accuracy of less than 0.02 µ m, which is required for device fabrication and margin. For obtaining the reliable shot stitching accuracy between CP and variably shaped (VS) EB writings, we adopted the cross-correlation method, which was used to decide the size and center position of the CP shot. A single-layer resist system without an over-coated conducting layer was used for reliable device fabrication. In addition, for improving the CD accuracy for all 0.15 µ m designed patterns in a full-scale chip, we developed a data partition process suitable for CP mask pattern data and an improved 1-dimenshinal(1-D) calculation method for proximity effect correction. Utilizing these techniques, the full-scale 4Gbit DRAM, which was designed with 0.15 µ m minimum feature size, was fabricated successfully with 0.05 µ m (| mean|+3σ) overlay accuracy, 0.02 µ m (| mean+3σ) stitching accuracy, and less than 0.02 µ m (3σ) CD accuracy, all of which were sufficient for the required device fabrication.
NEC's recent progress in the development of electron-beam (EB) cell projection technology is reviewed. To make it practical, not only the development of a high-performance EB direct writing system but also the establishment of its peripheral technologies in the micro-fabrication process are pursued. In order to obtain high lithographic performance in the EB cell projection lithography system HL-800D (Hitachi), the fundamental effects in EB lithography such as the Coulomb interaction effects, the proximity effect and electron scattering by cell projection aperture (EB mask), have been studied. In addition, high-resolution and high-sensitivity resists have been developed. The Coulomb interaction effects are found to be the most critical issue in cell projection lithography because it affects resolution, linewidth accuracy and throughput. For high resolution, the beam current was reduced to suppress the Coulomb interaction. As a result, a resolution of 0.15 µ m, which is sufficient for fabricating a 1G DRAM, was obtained using the high-resolution resist. To achieve high-linewidth accuracy of less than ±5% for 0.2 µ m lines-and-lines (L/S), optimization of the EB mask structure and the development of a proximity effect correction method which includes the Coulomb interaction effect correction were carried out. Inspection technology for devices of 0.2 µ m or less was also investigated in order to accurately measure linewidth, and to detect defects, particularly those caused by shot stitching error. Finally, the cell projection technology has been applied to the device fabrication of a 1G DRAM, and was demonstrated to be feasible for the development of futuristic advanced devices.
This paper describes improved 0.25 µm electron beam (EB) direct writing techniques for 256 Mbit dynamic random access memory (DRAM) fabrication. In particular, three techniques were each improved and optimized: (1) an EB writing system technique for improving overlay accuracy, (2) a resist process technique for fabricating reliable fine patterns, and (3) a pattern data preparation technique for correcting proximity effect and reducing data conversion time. The overlay accuracy for the EB direct writing layer to the mark detection layer was improved to under 0.075 µm(|| x̄|| +3σ), which is sufficient for the required alignment tolerance. The resist system was optimized for each EB direct writing layer considering a deposited energy distribution, which was calculated by the Monte Carlo method. To reduce data conversion time (central processing unit (CPU) time), a vector processing technique and a 1-dimensional caiculation method applied to proximity effect correction were developed, and a drastic reduction to about 30-60 min was achieved. Utilizing these iechniques, a 256 Mbit DRAM having a feature size of 0.25 µm was successfully fabricated.
The effect of incident electron-beam conditions, which are acceleration voltage and beam blur of variable-shaped electron-beam direct writing, is investigated using the deposited energy distribution to realize a fine pattern of ≤0.25 μm in trilayer resist process. The deposited energy distribution is calculated using a three-dimensional Monte Carlo method. In a trilayer resist system, a thin bottom resist layer can be used, because the contrast value derived from the Monte Carlo calculation is independent of the bottom layer thickness. The beam blur of 0.05 μm does not degrade 0.25 μm line-and-space (L/S) patterns, but seriously degrades 0.1 μm L/S patterns. Higher acceleration voltage is effective for improving the contrast. At lower acceleration voltage, the slope of the deposited energy profile defined at the resist bottom is mainly influenced by electron scattering. On the other hand, at higher acceleration voltage, the slope of deposited energy profile mainly depends on the beam blur. The 0.1 μm L/S patterns are expected to be resolved at 30 kV when there is less than 0.02 μm beam blur with trilayer resist system. The possibility of using a single layer resist process for 0.1 μm L/S pattern will be barely realized at the conditions of 50 kV and 0.02 μm beam blur.
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