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Gate-all around (GAA) device is one of the cutting-edge technologies and the advantages of these devices can be improved by incorporating the dual material (DM) and graded channel (GC) techniques. This manuscript investigates for the first time, the performance analysis of DMGC CGAA FET and circuit applications such as inverter, NAND, NOR, ring oscillator and 6T SRAM. It has been found that the Ioff, SS, DIBL, Ion/Ioff ratio are enhanced by an amount of 96.93%, 19.49%, 51.26%, 96.98% respectively for DMGC CGAA FET when compared to SMGC CGAA FET. Single-k (SiO2) and dual-k (SiO2+HfO2) techniques are also utilized here to analyse the device performance and dual-k recorded better performance in comparison with single-k owing to reduced off-state currents. It is noticed that delay has been reduced greatly for Inverter, NAND, and NOR by an amount of 51.93%, 11.25%, and 10.07% respectively for dual-k when compared to single-k DMGC CGAA FET. The frequency of oscillations for Ring Oscillator is improved by 69.7% with dual-k than single-k. Further, the obtained results of SRAM are compared with the existing literatures and noticed that the proposed DMGC CGAA FET outperforms the other works making the device a potential candidature for high performance applications.

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This manuscript introduces a pioneering investigation on the temperature effects of Dual Material Graded Channel (DMGC) Cylindrical Gate All Around (CGAA) FET by outlining its significance in various aspects such as analog/RF, self-heating, and linearity performance metrics. For this analysis, we have proposed a DMGC CGAA FET by amalgamating the gate and channel engineering techniques and the temperature is varied from 250K to 450K. A significant improvement in Ion/Ioff, SS, and DIBL by an amount of 96.98%, 19.49%, and 51.26% is obtained respectively for the proposed DMGC CGAA FET as compared to the single material graded channel (SMGC) CGAA FET. As the temperature is reduced from 450K to 250K, a noticeable improvement in analog/RF figure of merits and delay is obtained. Further, the self-heating effect (SHE) analysis revealed that the utilization of lower Rth is preferrable to minimize SHE in the device. Moreover, linearity parameters like gm2, gm3, VIP2, VIP3, IIP3 and IMD3 are noticed to be better for lower temperatures at higher VGS indicating good linearity. The obtained results make proposed device an ideal choice for various applications especially that operate in low temperature environments such as deep space, military, and RF applications.