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This paper describes a new analog-to-digital converter based on the traditional dual-slope ADC operation. With a small modification to the discharging phase of the dual-slope ADC, first-order quantization noise shaping is achieved. This quantizer is used in a second-order loop filter and results in an overall third-order quantization noise shaping. To remove the need for any extra active element, this quantizer is merged with the active adder. In this fashion, the multi-bit flash ADC is removed and hence the loading of the active-adder is reduced to a single continuous-time comparator. Furthermore, to alleviate the speed of the counting-clock and the common-mode biasing accuracy requirements, a bi-directional discharging scheme is proposed. As a proof of concept, the second-order loop filter with the proposed quantizer is fabricated in a 0.18 m CMOS technology and achieves over 78 dB SNDR with an oversampling ratio of 24 and 50 MHz sampling speed. The power consumption is 2.9 mW from a 1.5 V power supply.

An all-digital programmable and reconfigurable stochastic ADC is presented in this work. This ADC directly benefits from scaling by using only digital gates and relying on increased mismatch between minimum sized transistors. The programmability and reconfigurability are achieved by dividing the design into 8 channels. The mean of each channel is set independently using a digitally generated analog reference voltage with a 10-bit control word. The output of each channel is linearized using Gaussian linear interpolation. The entire ADC is written in Verilog and synthesized into digital standard cells using regular digital design tools. Fabricated in a 130 nm CMOS process, the ADC covers SNDR from 28 dB to 34.9 dB with programmable differential input range of 400 mVpp to 800 mVpp at 140 MS/s and 0.7 V supply.

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In the last decade and so, a large amount of research has been done to secure hardware. Security features such as physically unclonable function (PUF), hardware metering, and obfuscation have been developed to protect hardware from threats. Detection and avoidance techniques for IC counterfeiting and hardware Trojan have been introduced to protect the IC supply chain. Till now, research has focused on digital ICs, but analog and mixed signal (AMS) ICs which hold the highest share in the market have been neglected. The solutions developed in digital domain for digital ICs do not extend well to AMS ICs. Thus, a major portion of the IC market remains unsecured. In this paper, we described the challenges and limitations associated with AMS IC security research focusing on three major sections: AMS-enabled security, counterfeiting, and AMS hardware Trojans. We also express a vision for AMS security research.