This paper presents a comparison in the consumed power between different configurations of dynamic latched comparator used in low power Analog to Digital (AiD) converters especially the successive approximation register (SAR) which is used in many Electrical, Radio-frequency identification (RFID) and biomedical applications. This comparison is in architecture, consumed power and propagation time delay. The comparison is done under constant input referred offset.
High-precision analogue circuits suffer from the finite gain and nonlinearity of operational amplifiers (opamps). Correlated level shifting is one efficient technique that provides gain and swing enhancement for switched-capacitor circuits. Charge-compensated correlated level shifting is proposed, a modification for the correlated level shifting technique, that improves the efficiency of gain enhancement for single-stage opamps.
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