We have developed an excellent fabrication method for a Si single-electron field effect transistor memory device having a self-aligned floating dot gate. This device demonstrates single electron memory operation at room temperature. The ability to precisely control the size and position of the floating dot gate and the channel indicates the feasibility of practical single-electron memory.

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We fabricated a Si single electron tunneling transistor which has a nanoscale floating dot gate stacked on a Coulomb island by a self-aligned process. This device exhibits drain current (Id) oscillations due to the Coulomb blockade effect and quantized threshold voltage (Vth) shifts resulting from a single electron tunneling from the channel to the floating dot gate. The high on/off current ratio of the Id oscillation combined with the quantized Vth shifts leads to the possibility of developing ultralow power consumption memory.

We report on the first direct observation of the additivity of the quantized conductance for multiple parallel quantum point contacts. We have studied from 1 to 4 parallel quantum point contacts and find that the total conductance can be written in the form (2e 2 N L N QPC/h) as a function of the applied gate voltage, where N QPC is the number of parallel quantum point contacts. The processing of multiple parallel quantum point structures is also described.

Articles you may be interested inSingle-electron transistors based on self-assembled silicon-on-insulator quantum dots Si single electron tunneling transistor with nanoscale floating dot stacked on a Coulomb island by self-aligned process Appl.

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