Photonic systems based on complementary metal oxide semiconductor (CMOS) technology require the integration of passive and active photonic devices. The integration of waveguides and photodetector is one of the most important technologies. We report a Ge p-i-n photodetector that is monolithically integrated with silicon oxynitride and silicon nitride waveguides. All processes and materials are CMOS compatible and can be implemented in the current integrated circuit process technology. The small size of the devices results in low absolute dark current. The waveguidecoupled Ge devices show high efficiency (~90%) over a wide range of wavelengths well beyond the direct band gap of Ge, resulting in a responsivity of 1.08 A/W for 1550 nm light. The device speed of 7.2 GHz at 1V reverse bias is strongly affected by the capacitance of the probe pads. The high-performance of the devices at low voltage (

A PRAM cell with great scalability and high speed operation capability with excellent reliability below 20nm technology was demonstrated. This has the meaning of the potential applicable to the technology area of scaling limitation of DRAM cell.We fabricated a confined PRAM cell with 7.5nmx17nm of below 4F 2 . In particular, Sb-rich Ge-Sb-Te phase change material was employed for high speed operation below 30nsec. The excellent writing endurance performance was predicted to maintain up to 6.5E15cycles by reset program energy acceleration. Its data retention was 4.5 years at 85 o C which is enough for DRAM application.

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A one-dimensional heat conduction model is developed for a phase change random access memory device with an 8F2 memory cell structure (F=0.15 μm). The required current level for a reset operation, which corresponds to the phase switching from a crystalline (“1” state) to an amorphous phase (“0” state) of Ge2Sb2Te5, was investigated by calculating one-dimensional temperature profiles for the memory cell structure. It is revealed that a reset operation is not achieved at the current level (2 mA) reported for existing devices with a subquarter micron plug size when only TiN is used as a resistive heater. However, it is possible when an additional heating layer of 5 nm thickness is inserted between the TiN and Ge2Sb2Te5 layers, for which the electrical resistivity ρelec is higher than 105 μΩ cm, and the thermal conductivity κ and specific heat c are as low as those of Ge2Sb2Te5. In addition, it is shown that a reset operation at a low current level of 1 mA can be realized in this memory cell when amorphous carbon (κ=0.2 W/m K and ρelec=106 μΩ cm) is used as an additional heating layer. It is believed that this relatively simple one-dimensional heat conduction model is a useful tool for analyzing the device operation of phase change random access memory devices and for selecting the proper conditions for an additional heating layer allowing for low-current operation.

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Multilevel thin film processing, global planarization and advanced photolithography enables the ability to integrate complimentary materials and process sequences required for high index contrast photonic components all within a single CMOS process flow. Developing high performance photonic components that can be integrated with electronic circuits at a high level of functionality in silicon CMOS is one of the basic objectives of the EPIC program sponsored by the Microsystems Technology Office (MTO) of DARPA. Our research team consisting of members from: BAE Systems, Alcatel-Lucent, Massachusetts Institute of Technology, Cornell University and Applied Wave Research reports on the latest developments of the technology to fabricate an application specific, electronic-photonic integrated circuit (AS_EPIC). Now in its second phase of the EPIC program, the team has designed, developed and integrated fourth order optical tunable filters, both silicon ring resonator and germanium electro-absorption modulators and germanium pin diode photodetectors using silicon waveguides within a full 150nm CMOS process flow for a broadband RF channelizer application. This presentation will review the latest advances of the passive and active photonic devices developed and the processes used for monolithic integration with CMOS processing. Examples include multilevel waveguides for optical interconnect and germanium epitaxy for active photonic devices such as p-i-n photodiodes and modulators.

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