A compact modeling approach for silicon-chip slow-wave transmission lines with slotted bottom metal ground planes is studied and its limitations are presented. The modeling approach facilitates the calculation of the slow-wave transmission line parameters based upon the corresponding coplanar and grounded coplanar transmission-line parameters. The described analysis method is used for a comparative study of the slow-wave structures versus their coplanar and grounded coplanar reference structures. Floating bottom shield slow-wave transmission lines are then compared with their grounded bottom shield counterparts. The theoretical results are supported by electromagnetic simulations and by measurements up to 30 and 50 GHz.
A method for the determination of interface properties between a depleted heteroepitaxial layer and a substrate is presented. The method is based on the measurement of the zero bias capacitance of a metal gate that forms a Schottky contact with the depleted epilayer. The interface charge density can be extracted regardless of the exact values of the energy band discontinuities. A microscopic electrostatic analysis of the interface is presented which takes into account the effects of interface charges and interface dipoles. Experimental results are presented for the case of ZnTe epilayers grown by metal organic chemical vapor deposition on CdTe substrates.
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