Undoped silicate glass deposited using the tetraethylorthosilicate (TEOS) and ozone thermal reaction has been selected as one of the candidates for shallow trench isolation applications. As a replacement for existing low pressure or atmospheric pressure chemical vapor deposition processes for device dimensions below 0.25 μm, TEOS/ozone films deposited at high temperature (>550°C) exhibit the superior qualities in terms of void‐free trench fill. In this paper, we present some characterization of the silicon oxide film deposited in the subatmospheric pressure regime using TEOS/ozone chemistry, aimed at developing a high‐quality dielectric film to meet shallow trench isolation gap‐fill requirements. It is also identified that low ozone/TEOS ratio reduces surface and pattern sensitivity. Therefore, no additional treatment or predeposition is necessary. Moreover, to enhance the etch resistance of the silicon oxide, the as‐deposited film is annealed at high temperature for densification and bond reconstruction. © 1999 The Electrochemical Society. All rights reserved.
Borophosphosilicate glass (BPSG) has been widely used as a premetal dielectric for planarization of high aspect ratio (AR) topography in advanced very large scale integrated device fabrication 1-3 due to its reflow capability at elevated temperatures. High temperature annealing is used to eliminate as-deposited voids and stabilize the BPSG layer. However, as device dimensions shrink, the allowable thermal cycle for BPSG deposition and reflow is being reduced. For straight or even reentrant trench wall profiles, other processes with good conformality, e.g., undoped silicon oxide and phosphosilicate glass, are not suitable to achieve void-free gap fill at a >5:1 aspect ratio with uniform etch resistance inside the gap. Even though the conformality of the as-deposited BPSG films has been greatly enhanced by using O 3 /tetraethoxysilane (TEOS) chemistry 4-5 instead of the conventional O 2 /silane or plasma enhanced processes, it remains a challenge to deposit enough material down into the small size gaps to achieve the best reflow at minimal annealing temperature. In this paper, we present some characterization results on an subatmospheric pressure chemical vapor deposition (SACVD) BPSG process to extend gap filling capability. Based on this information, a two-step deposition process was developed, which is capable of achieving void-free gap filling at 0.06 m trench width and a >6:1 aspect ratio even with reentrant sidewall profile.Experimental The experiments were conducted in an Applied Materials GigaFill SACVD Centura ® chamber, which is described in detail elsewhere. 6 The schematic is shown in Fig. 1, briefly, this is a single wafer process tool equipped with a high temperature heater and remote plasma clean system. Liquid TEOS and dopants (triethylborate, TEB and triethylphosphate, TEPO) are vaporized via PLIS (precision-liquid-injection-system) and carried into the process chamber using He 7 as a carrier gas, then mixed with O 3 . After flow distribution, the gas mixture impinges onto the wafer, which is placed on the hot heater surface, to form a BPSG film. After each wafer deposition, a chamber cleaning process is performed using fluorine atoms generated by the remote plasma clean system to remove any residue buildup during deposition and ensure process repeatability from wafer to wafer. The process controlling variables include chamber pressure (P), heater temperature (T s ), TEOS and dopant (TEB and TEPO) flow rates, O 3 concentration, and flow rate.Most of the film properties were measured on a bare silicon substrate, whereas the gap filling performance is evaluated on patterned structures. The postdeposition annealing was performed either in a furnace or in the Applied Materials rapid thermal processing (RTP) Centura system. The scanning electron micrograph photos were taken after sample decoration using a 6:1 buffer oxide etch for 10 s.Results and Discussion A statistical design of experiments (DOE) was employed to characterize the SACVD BPSG process. A screening experiment was designed to evaluate both...
Oxygen and tetrafluorocarbon magnetically enhanced reactive ion etching (MERIE) of plasma chemical vapor deposited (CVD) boron nitride (BN) and silicon boron nitride (SiBN) was studied for both blanket and submicron patterned films. The relative etch selectivities of the BN and SiBN to oxide (SiO2) and nitride (SIN) were determined. In general, oxygen-rich Q/CF4 MERIE produce very high etch selectivity results while maintaining vertical etch profiles. This etch process expands the potential for use ol BN/SiBN in fabrication of subhalf micron devices.) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 142.58.129.109 Downloaded on 2015-06-04 to IP
Ultraclean semiconductor processes were developed for ULSI technologies to significantly reduce metallics, foreign materials, and to preserve silicon surface morphology. State-of-the-art detection techniques (Elymat, TXRF, VPD, and SPV) were implemented in all critical process sectors. Acceptable levels of metallic contamination were derived from previous experience and from published work on this subject relating metallic contamination levels to gate oxide reliability and retention time.A comprehensive diagnostic/characterization system was utilized in evaluating a wide variety of test structures emulating key device process interactions. Advanced techniques were employed for measurement of reliability and surface morphology. Also root causes for all integration problems are identified.
. ABSTRACTOxygen and tetrafluorocarbon magnetically enhanced reactive ion etching (MERlE) of plasma chemical vapor deposited (CVD) boron nitride (BN) and silicon boron nitride (SiBN) was studied for both blanket and submicron patterned films. The relative etch selectivities of the BN and SiBN to oxide (Si02) and nitride (SiN) were determined. In general, oxygen rich 02/CF4 MERlE produce very high etch selectivity results while maintaining vertical etch profiles.This etch process expands the potential for use of BN/SiBN in fabrication of sub-half micron devices. . INTRODUCTIONFor sub-half micron microelectronic fabrication, plasma CVD BN and SiBN have been considered for fabrication schemes. Highly stable plasma CVD BN films can be deposited using diborane/ammonia'7 or borazine8 sources.The appropriate etch and polish selectivities are desirable for patterning and building contact and wiring levels in microelectronic devices. High polish selectivities of BN films to Si02 and SiN have been reported recently9, and ae advantageous when fabricating sub half micron devices that require very small critical dimensions for enhanced performance. Reactive ion etching of BN films using CF4/H2 have been reported"7 as well using fluorine-rich CF4/02 plasma'°'11. However, the high selectivity etching of BN and SiBN insulators over commonly used Si02 and SiN dielectrics has not been previously reported.In this paper, we present high selectivity MERlE of BN and SiBN films using an oxygen-'rich fluorine based, single wafer process.'2 The study examined the etch selectivity of BN/SiBN to Si02 and SiN using various CF4/(1O-90%)02 flow ratios. The effects of pressure, power, magnetic field and CF4/02 flow ratio in the oxygen-rich regime were also explored. Using this high selectivity etch process, patterned BN and SiBN films were etched to build submicron tungsten wiring for microelectronic devices. 3. EXPERIMENTAL 3.1 Tool configuration Blanket and masked BN and SiBN films were etched in an automated single O819413625/94/$600 SPIE Vol. 2091 / 197 Downloaded From: http://proceedings.spiedigitallibrary.org/ on 06/21/2016 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx
In semiconductor industry borophosphosilicate glass (BPSG) films formed by chemical vapor deposition (CVD) are widely utilized as dielectric layers between conductor lines. This glass has to provide void-free fill of 0.2-0.5 pm wide spaces between conducting lines with aspect ratios up to 4: 1. Therefore good glass reflow properties, which are a function of boron and phosphorus dopant concentration and of deposition and anneal temperature, are required. Dopant concentrations need to be low enough to avoid undesired surface crystallization phenomena and to provide a stable surface. Anneal temperatures have to be low to fulfill the thermal budget criteria of advanced silicon devices.
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