Advanced Technology Processing and State-of-the-art Solutions to Cleaning, Contamination Control, and Integration Problems

Abstract

Ultraclean semiconductor processes were developed for ULSI technologies to significantly reduce metallics, foreign materials, and to preserve silicon surface morphology. State-of-the-art detection techniques (Elymat, TXRF, VPD, and SPV) were implemented in all critical process sectors. Acceptable levels of metallic contamination were derived from previous experience and from published work on this subject relating metallic contamination levels to gate oxide reliability and retention time.A comprehensive diagnostic/characterization system was utilized in evaluating a wide variety of test structures emulating key device process interactions. Advanced techniques were employed for measurement of reliability and surface morphology. Also root causes for all integration problems are identified.

Key measurements of ultrathin gate dielectric reliability and in-line monitoring

“…The addition of silicon nitride as a diffusion barrier prevents back-side metal contamination from diffusing into the silicon and possibly into the active areas of a device. A more detailed discussion of metallic contamination and its control can be found in [25].…”