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INTRODUCTIONChordomas are rare, slow growing, locally destructive bone tumours arising from the notochord.PRESENTATION OF CASEPresenting a case of a 65 year old man, who presented with complaints of swelling on the right lower back for 1 year associated with pain.On, physical examination, a swelling measuring 5 cm × 4 cm was noted in the lower back with posterior wall indentation on per rectal examination.MRI revealed a mass lesion involving the sacrum (s3–s4) and coccyx. FNAC showed features of a chroma.At surgery, we excised a mass from the retrorectal space and biopsy proved it to be a chondroid chordoma, a variant of chordoma.DISCUSSIONChordomas are solid malignant tumours that arise from vestiges of the foetal notochord. Common locations are the clivus and the sacrococcygeus region.Annual incidence of these tumours is 1 in one million. MRI is the imaging modality of choice. Prognosis improves based on the age, resected margins and postoperative treatment.CONCLUSIONHere, we shall discuss the literature, variants, treatment and prognosis of this rare tumour.

As the industry moves towards sub-65nm technology nodes, the mask inspection, with increased sensitivity and shrinking critical defect size, catches more and more nuisance and false defects. Increased defect counts pose great challenges in the post inspection defect classification and disposition: which defect is real defect, and among the real defects, which defect should be repaired and how to verify the post-repair defects.In this paper, we address the challenges in mask defect verification and disposition, in particular, in post repair defect verification by an efficient methodology, using SEM mask defect images, and optical inspection mask defects images (only for verification of phase and transmission related defects).We will demonstrate the flow using programmed mask defects in sub-65nm technology node design. In total 20 types of defects were designed including defects found in typical real circuit environments with 30 different sizes designed for each type. The SEM image was taken for each programmed defect after the test mask was made. Selected defects were repaired and SEM images from the test mask were taken again. Wafers were printed with the test mask before and after repair as defect printability references.A software tool SMDD-Simulation based Mask Defect Disposition-has been used in this study. The software is used to extract edges from the mask SEM images and convert them into polygons to save in GDSII format. Then, the converted polygons from the SEM images were filled with the correct tone to form mask patterns and were merged back into the original GDSII design file. This merge is for the purpose of contour simulation-since normally the SEM images cover only small area (~1 μm) and accurate simulation requires including larger area of optical proximity effect. With lithography process model, the resist contour of area of interest (AOI-the area surrounding a mask defect) can be simulated. If such complicated model is not available, a simple optical model can be used to get simulated aerial image intensity in the AOI. With built-in contour analysis functions, the SMDD software can easily compare the contour (or intensity) differences between defect pattern and normal pattern. With user provided judging criteria, this software can be easily disposition the defect based on contour comparison. In addition, process sensitivity properties, like MEEF and NILS, can be readily obtained in the AOI with a lithography model, which will make mask defect disposition criteria more intelligent.

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A new type of through‐silicon via (TSV) defect, silicon fin defect, which was found after the TSV deep‐reactive‐ion‐etching process at the TSV bottom is reported. These defects are considered killer TSV defects that may cause process or mechanical failures and have to be eliminated. A scanning electron microscope automatic process inspection approach, which is non‐destructive and proven to be effective, has been established to image the fin defects at the bottom of the trench. A possible root cause of this defect is also explored. Both simulation and benchmarking test results indicate that bulk micro defects (BMDs) in the silicon substrate could serve as a micro‐mask during etching and result in silicon fin defects.

Optical projection lithography has been the workhorse of the integrate circuit (IC) manufacturing industry to transfer the computer-aided design (CAD) to semiconducting material wafers. The resolution limit of the 193 nm wavelength lithography which was initially targeted for the 90 nm design rule has been further extended to realise ∼10-20 nm devices with ingenious interventions. The three-dimensional fin-shaped field-effect transistor device structure now realise the <20 nm design rule still using 193 nm projection lithography as the widely accepted solution. The extreme ultraviolet wavelength source systems are still in development and testing phases with some recent success reported, but still falling short of supporting volume production requirements. This study reviews the current trends in lithography and the associated resolution enhancement techniques with brief introduction to an integrated CAD analysis for hotspot detection.