OPC verification and hotspot management for yield enhancement through layout analysis

Yoo, Gyun; Kim, Jungchan; Lee, Taehyeong; Jung, Areum; Yang, Hyunjo; Yim, Donggyu; Park, Sung-Ki; Maruyama, Kotaro; Yamamoto, Masahiro; Vikram, Abhishek; Park, Sang-Ho

doi:10.1117/12.870395

Cited by 12 publications

(5 citation statements)

References 7 publications

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“…A suitable monitoring scheme for VIA dishing is necessary to avoid structural and reliability issues such as interconnection open, metal void, metal diffusion, etc. The industry has developed several methods in the product development flow to proactively identify these hotspots, also known as weak points [7][8][9] . Despite all such design verification methods, we must still employ aggressive metrology methods to detect any deformation during fabrication [10,11] .…”

Section: X-tackingmentioning

confidence: 99%

Metrology Challenges in 3D NAND Flash Technical Development and Manufacturing

Zhang¹,

Xu²,

Wang³

et al. 2019

Journal of Microelectronic Manufacturing

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3D NAND technical development and manufacturing face many challenges to scale down their devices, and metrology stands out as much more difficult at each turn. Unlike planar NAND, 3D NAND has a three-dimensional vertical structure with high-aspect ratio. Obviously top-down images is not enough for process control, instead inner structure control becomes much more important than before, e.g. channel hole profiles. Besides, multi-layers, special materials and YMTC unique X-Tacking technology also bring other metrology challenges: high wafer bow, stress induced overlay, opaque film measurement. Technical development can adopt some destructive methodology (TEM, etch-back SEM), while manufacturing can only use nondestructive method. These drive some new metrology development, including X-Ray, mass measure and Mid-IR spectroscopy. As 3D NAND suppliers move to >150 layers devices, the existing metrology tools will be pushed to the limits. Still, the metrology must innovate.

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Section: X-tackingmentioning

confidence: 99%

Metrology Challenges in 3D NAND Flash Technical Development and Manufacturing

Zhang¹,

Xu²,

Wang³

et al. 2019

Journal of Microelectronic Manufacturing

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“…Focus Exposure Matrix (FEM) technique plays an important role in early detecting these defects caused by mask or OPC and process marginalities. 1,2 Conventional FEM methodology prints a wafer with a controlled variation of focus and exposure, followed by a defect inspection step. The inspection tools include Bright Field, Broadband Plasma, or E-beam inspection tools in a high sensitivity mode.…”

Section: Introductionmentioning

confidence: 99%

Improving FEM wafer review efficiency by introducing different pattern grouping modes

Gao¹,

Yan²,

Zhang³

et al. 2023

DTCO and Computational Patterning II

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As the semiconductor process technology steps into a more advanced node, design and process induced systematic defects become increasingly significant yield limiters. Focus Exposure Matrix (FEM) method is crucial for early detection of these defects. However, analysis of a typical FEM wafer which contains half million of defects requires extensive time and efforts. In order to improve FEM wafers review efficiency, we introduce a smart review point selection strategy based on different layout pattern grouping modes. This review point selection strategy enable engineers to sample the more effective defects for SEM review.

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“…In Fab's early development stage, it is used for OPC recipe tuning and optimization experiments. In Fab's production stage it is used for mask tape out gatekeeping and preparing hotspot monitoring points [5].…”

Section: Introductionmentioning

confidence: 99%

Machine learning assisted effective OPC verification hotspot capture

Yin,

Chew,

Shang

et al. 2023

Photomask Technology 2023

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OPC verification and hotspot management for yield enhancement through layout analysis

Cited by 12 publications

References 7 publications

Metrology Challenges in 3D NAND Flash Technical Development and Manufacturing

Metrology Challenges in 3D NAND Flash Technical Development and Manufacturing

Improving FEM wafer review efficiency by introducing different pattern grouping modes

Machine learning assisted effective OPC verification hotspot capture

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