Condition monitoring (CM) has already been proven to be a cost effective means of enhancing reliability and improving customer service in power equipment, such as transformers and rotating electrical machinery. CM for power semiconductor devices in power electronic converters is at a more embryonic stage; however, as progress is made in understanding semiconductor device failure modes, appropriate sensor technologies, and signal processing techniques, this situation will rapidly improve. This technical review is carried out with the aim of describing the current state of the art in CM research for power electronics. Reliability models for power electronics, including dominant failure mechanisms of devices are described first. This is followed by a description of recently proposed CM techniques. The benefits and limitations of these techniques are then discussed. It is intended that this review will provide the basis for future developments in power electronics CM.

No abstract

Use policyThe full-text may be used and/or reproduced, and given to third parties in any format or medium, without prior permission or charge, for personal research or study, educational, or not-for-prot purposes provided that:• a full bibliographic reference is made to the original source • a link is made to the metadata record in DRO • the full-text is not changed in any way The full-text must not be sold in any format or medium without the formal permission of the copyright holders.Please consult the full DRO policy for further details. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Abstract-In many power converter applications, particularly those with high variable loads such as traction and wind power, condition monitoring of the power semiconductor devices in the converter is considered desirable. Monitoring the device junction temperature in such converters is an essential part of this process. In this paper, a method for measuring the IGBT junction temperature using the collector voltage dV /dt at turn-off is outlined. A theoretical closed-form expression for the dV /dt at turn-off is derived, closely agreeing with experimental measurements. The role of dV /dt in dynamic avalanche in highvoltage IGBTs is also discussed. Finally, the implications of the temperature dependence of the dV /dt are discussed, including implementation of such a temperature measurement technique.

No abstract

No abstract

No abstract

No abstract

No abstract