Three stages CMOS operational amplifier frequency compensation using single Miller capacitor and differential feedback path

Self Cite

In this paper, we theoretically propose and mathematically describe an effective four‐stage structure in Complementary metal‐oxide‐semiconductor (CMOS) technology based on differential block feedback. The special architecture of frequency compensation network improves frequency response with very small value of compensation capacitor, which results in low die area occupation. The presented novel and simple four‐stage structure is frequency compensated just via single Miller capacitor and a differential block. Symbolical transfer function is calculated, and circuit dynamics are introduced. To well explain theoretical description, the proposed configuration at circuit level is simulated using Taiwan Semiconductor Manufacturing Company Limited (TSMC) 0.18‐μm CMOS technology and HSPICE circuit simulator. The proposed configuration and corresponding circuit benefits from circuit simplicity and low die‐area occupation. The frequency compensation network forms two Miller loops with negative loop gains. Feedback paths are amplified via differential block while feedforward paths are attenuated, leads to improving frequency response compare with conventional structures. Ample simulation results are in good agreement with theoretical description. Leveraging the concept and method proposed four‐stage amplifier exhibits 170 dB, 8.12 MHz, and 90° as direct current (DC) gain, Gain‐BandWidth Product (GBW), and Pase Margin (PM), respectively. The supply voltage is set to 1.8 V, while the simulated circuit consumes 380 μW.

Section: Introductionmentioning

confidence: 99%

“…This leads to the fact that the system is capable of fluctuating itself in unexpected ways. 17 We need therefore to know how much accuracy is needed for a specific…”

mentioning

confidence: 99%

A high‐performance CMOS four‐stage amplifier

Zanjani

Asiyabi

Biabanifard³

2019

Self Cite

“…Finally, ACBC is known as one of the best techniques for frequency compensation. In this method, the second‐stage gain is increased in high frequency, therefore, improving the overall frequency response of an OTA [9, 14, 16‐35] …”

Section: Introductionmentioning

confidence: 99%

“…In this method, the second-stage gain is increased in high frequency, therefore, improving the overall frequency response of an OTA [9,14,[16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31][32][33][34][35]. 9,14,[16][17][18][19][20][21][22] In this article, a new compensation technique is proposed. It uses a fully differential feedback path to remove the feedforward path and enhance the frequency response regarding PM and GBW.…”

Section: Introductionmentioning

confidence: 99%

Multistage operational transconductance amplifier frequency compensation technique based on fully differential feedback stage

Zanjani

Khatib

Chabok

2019

In this article, a new configuration of a three-stage Complementary metaloxide-semiconductor (CMOS) operational transconductance amplifier (OTA) isproposed. It removes the feedforward path while simultaneously amplifying the feedback path in the compensation network. Also, the proposed circuit uses only one small compensation capacitor which makes it appropriate regarding die area. The approach behind is demonstrated through a successful design using 0.18-μm CMOS technology. In fact, the simulated OTA shows better performance in comparison with other methods and achieved 20.2 MHz, 82 , and 124 dB as gain-bandwidth product, phase margin, and DC gain, respectively, and consumes 545 μW @ 1.8 V. K E Y W O R D S

“…Most recently reported buffer amplifiers use a three‐stage nested Miller compensated topology to get better linearity for a given power consumption and silicon area as compared with a simple two‐stage Miller structure . Using the nested Miller compensation (NMC) structure or reversed NMC (RNMC) topology is a common technique to implement a multistage operational amplifier as shown in Figure .…”

Section: Introductionmentioning

confidence: 99%

Differential block frequency compensation for low‐power multistage amplifiers

Asiyabi

Torfifard

2018

A new power-efficient frequency compensation structure is presented, named the differential block frequency compensation (DBFC) topology. The new compensation technique employs a fully differential stage to organize feedforward and feedback paths. The DBFC technique relieves feedforward and able to amplify feedback currents to move poles and zeros accordingly, which leads to pole-zero cancelation scenario. Initially, the proposed structure uses only small compensation capacitance, which means very compact and refined design. The proposed circuit along with several state-of-the-art designs from the literature have been extensively analyzed and compared together. The results reveal the improvement regarding to figure of merit factors, which highlight size of compensation circuits, stability, and power dissipation issues. Moreover, the gain-bandwidth product increases more than 30 times than of other compared circuits. KEYWORDS differential block frequency compensation, low power, low voltage, operational transconductance amplifier