This paper presents a two-stage power-efficient class-AB operational transconductance amplifier (OTA) based on an adaptive biasing circuit suited to low-power dissipation and low-voltage operation. The OTA shows significant improvements in driving capability and power dissipation owing to the novel adaptive biasing circuit. The OTA dissipates only 0.4 µW from a supply voltage of ±0.6 V and exhibits excellent high driving, which results in a slew rate improvement of more than 250 times that of the conventional class-AB amplifier. The design is fabricated using 0.18-µm CMOS technology.
A new power-efficient frequency compensation structure is presented, named the differential block frequency compensation (DBFC) topology. The new compensation technique employs a fully differential stage to organize feedforward and feedback paths. The DBFC technique relieves feedforward and able to amplify feedback currents to move poles and zeros accordingly, which leads to pole-zero cancelation scenario. Initially, the proposed structure uses only small compensation capacitance, which means very compact and refined design. The proposed circuit along with several state-of-the-art designs from the literature have been extensively analyzed and compared together. The results reveal the improvement regarding to figure of merit factors, which highlight size of compensation circuits, stability, and power dissipation issues. Moreover, the gain-bandwidth product increases more than 30 times than of other compared circuits. KEYWORDS differential block frequency compensation, low power, low voltage, operational transconductance amplifier
In this paper, a new electrospinning device is designed and fabricated based on the pulsed system. The general model of electrospinning process is represented. Moreover, the produced nanofibers are characterized by Scanning Electron Microscopy (SEM) and Fourier Transform Infrared (FTIR). The effects of concentration and voltage depended on the collector rotation are investigated on the electrospinning process. The three different polystyrene solutions with the three various voltages are used to produce several polymer nanofibers. The experimental results reveal that the increase in polymer concentration enlarges the thickness of nanofiber while increase in applied voltage causes to decrease the nanofiber thickness. The results are compared with similar research. For our research, we applied the 10 KV voltage instead of 20 KV voltage as indicated in the literature. The measured results show that the proposed model has good adjacency with respect to analytical and experimental data.
This paper presents a new and simple frequency compensation scheme for multistage CMOS operational transconductance amplifiers (OTAs). In this work, by applying a differential block frequency compensation (DBFC) technique to a compensation network of three-stage OTA, the dominant pole is drastically improved independent from the DC gain path. The DBFC introduces amplified signal directly to the second-stage output through the compensation capacitor. The signal injection increases operational frequency range while just a single and small value capacitor is used as the Miller capacitor, which leads to considering the proposed configuration as a low die area occupation and high-speed amplifier. The simulation results show with the same capacitive load and power dissipation the gain bandwidth (GBW) frequency can be improved considerably compared to conventional nested Miller compensation. The presented circuit is simulated in a 0.18[Formula: see text][Formula: see text]m CMOS technology with a 1.8[Formula: see text]V supply voltage. According to the results, the proposed circuit shows 102[Formula: see text]dB, 105[Formula: see text]MHz, and 343[Formula: see text][Formula: see text]W as the DC gain, GBW, and power consumption, respectively.
In this paper, a new architecture of four-stage CMOS operational transconductance amplifier (OTA) based on an alternative differential AC boosting compensation called DACBC is proposed. The presented structure removes feedforward and boosts feedback paths of compensation network simultaneously. Moreover, the presented circuit uses a fairly small compensation capacitor in the order of 1 pF, which makes the circuit very compact regarding enhanced several small-signal and largesignal characteristics. The proposed circuit along with several state-of-the-art schemes from the literature have been extensively analysed and compared together. The simulation results show with the same capacitive load and power dissipation the unity-gain frequency (UGF) can be improved over 60 times than conventional nested Miller compensation. The results of the presented OTA with 15 pF capacitive load demonstrated 65° phase margin, 18.88 MHz as UGF and DC gain of 115 dB with power dissipation of 462 μW from 1.8 V.
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