Probe Module for Wafer-Level Testing of Gigascale Chips With Electrical and Optical I/O Interconnects

Abstract

The bandwidth provided by optical interconnects makes them an attractive solution for chip-to-package and chip-to-chip communications. In such systems, chips will have optical I/O interconnects fabricated alongside their conventional electrical counterparts. Virtually no work has been previously reported relating to the testing of such chips at the wafer-level. The requirements for probe hardware needed to achieve this are identified, and probe module configurations based on these requirements are presented. A high-density micro-opto-electro-mechanical-systems (MOEMS)-based probe substrate prototype for interfacing with chips having electrical and optical polymer pillar-based I/Os has been designed, and built using microfabrication techniques. Successful probing of an array of polymer pillar-based optical I/Os is reported.