Waveguides, mirrors, and polymer pillars can be integrated together to provide optical interconnects to the chip level. Total internal reflection in the polymer pillar provides a high level of spatial confinement of the light. The metallized mirror terminating the waveguide may be at 45 or at a nearby angle such as 54.74 (anisotropically etched silicon) and produce nearly equal coupling efficiencies. For a polymer waveguide, a gold mirror, and a polymer pillar of the dimensions fabricated, the simulated coupling efficiencies are 80.7% or 0.93 dB (45 mirror) and 82.5% or 0.84 dB (54.74 mirror), respectively. These simulations together with the fabrication and testing of a 54.74 mirror configuration demonstrates the viability of the waveguide-mirror-pillar structure, its insensitivity to mirror angle, and its compatibility with current substrate fabrication technologies.
Optical fibers are expected to play a role in chip-level and board-level optical interconnects because of limitations on the bandwidth and level of integration of electrical interconnects. Therefore, methods are needed to couple optical fibers directly to waveguides on chips and on boards. We demonstrate optical-fiber-to-waveguide coupling using carbon-dioxide laser-induced long-period fiber gratings (LPFGs). Such gratings can be written in standard fiber and offer wavelength multiplexing-demultiplexing performance. The coupler fabrication process and the characterization apparatus are presented. The operation and the wavelength response of a LPFG-based optical-fiber-to-waveguide directional coupler are demonstrated.
In the pursuit of high-density wafer-level input-output optical interconnections, microscopic polymer pillars have recently been fabricated. The optical performance of these pillars is critical for their potential application to gigascale integration. In the present work, the optical transmission of these pillars is analyzed and measured. It is shown that these polymer pillars act as precision many-moded waveguides, thus, verifying the cross-sectional uniformity, smoothness of surfaces, and optical quality of the material.
The scaling of BEOL interconnect technology in ULSI circuitry requires the integration of Cu wiring with ultra-low K (ULK) dielectrics. We present the results of a study of the interaction between different-stoichiometry Ta(N)/Cu barrier processes and porous ULK dielectrics (k=2.4) at 32nm groundrules Auger and diffraction analysis of blanket wafers was used to benchmark two different stoichiometries of TaN barrier deposited using commerciallyavailable ionized PVD sources. Comparison TEM and EDX/EELS images indicates that barrier oxidation is occurring in the low nitrogen-content Ta(N) barrier, which is absent at the higher stoichiometry. These differences are further manifested in defect-density analysis of patterned wafers comparing the two processes. These results illustrate the critical importance the TaN barrier properties play in enabling the integration of Cu/ULK interconnects at 32nm at beyond.
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