Development of Silicon Photonics Devices Using Microelectronic Tools for the Integration on Top of a CMOS Wafer

Abstract

Recommended by Pavel ChebenPhotonics on CMOS is the integration of microelectronics technology and optics components to enable either improved functionality of the electronic circuit or miniaturization of optical functions. The integration of a photonic layer on an electronic circuit has been studied with three routes. For combined fabrication at the front end level, several building blocks using a silicon on insulator rib technology have been developed: slightly etched rib waveguide with low (0.1 dB/cm) propagation loss, a high speed and high responsivity Ge integrated photodetector and a 10 GHz Si modulators. Next, a wafer bonding of silicon rib and stripe technologies was achieved above the metallization layers of a CMOS wafer. Last, direct fabrication of a photonic layer at the back-end level was achieved using low-temperature processes with amorphous silicon waveguide (loss 5 dB/cm), followed by the molecular bonding of InP dice and by the processing in microelectronics environment of InP μsources and detector.

Amorphous silicon nanowires combining high nonlinearity, FOM and optical stability

“…Finally, a-Si:H is deposited at low temperature and is compatible with standard CMOS technology. a-Si:H based photonics can be considered as an alternative technology to SOI for integrating photonic functions on CMOS [29][30][31][32][33]. Our results raise the prospect for a-Si:H to provide a truly practical and viable, high performance, platform for nonlinear photonic applications in the telecommunications wavelength window.…”

Photonic Packaging: Transforming Silicon Photonic Integrated Circuits into Photonic Devices

“…In particular, vertical integration improves the high-speed electronic interface to the PIC, because it acts to replace long (100-500 μm) possibly curved, wirebonds with short (≈10 μm) SBB or CPB interconnects, which minimizes parasitic induction effects [48][49][50]-see Figure 12. In addition to high-speed, high-density electronic integration, the mechanical connection offered by SBBs and CPBs also allows for the bridging of different functional technologies, such as MEMS (micro-electro-mechanical systems), III-V, non-CMOS ASIC (application-specific integrated circuit), etc.…”

Enhancement of VCSEL Performances Using Localized Copper Bonding Through Silicon Vias

“…Taleb attractive. Both technologies enable to bond individual chips or whole wafers onto silicon substrates , with the constraint to process extremely flat surface in the case of the VDW method (commonly SiO 2 layers are used in conjunction with chemical mechanical polishing technologies (CMP)) [7], whereas the polymer adhesive bonding technique is less restrictive on the surface roughness when adhesive layers such as benzocyclobutene (BCB) are used. [6].…”