Compact Electrothermal Reliability Modeling and Experimental Characterization of Bipolar Latchup in SiC and CoolMOS Power MOSFETs

Bonyadi, Roozbeh; Alatise, Olayiwola; Jahdi, Saeed; Hu, Junlin; Gonzalez, Jose Ortiz; Li, Ran; Mawby, P.A.

doi:10.1109/tpel.2015.2388512

Cited by 31 publications

(15 citation statements)

References 35 publications

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“…In order to explore the avalanche capability of SiC MOSFETs, some research has been carried out at a hightemperature scale [12]- [21]. For high-temperature SiC MOSFET modules and discrete devices, the avalanche current has been proved to be equal to the rated current at 25°C [12]- [14].…”

Section: Introductionmentioning

confidence: 99%

“…Furthermore, to illustrate the temperature dependence of BJT latch-up mechanism, an electrothermal model is developed based on the finite-element simulations over a temperature range of -25 to 125 ℃ [12], [20]. Particularly, the BJT latch-up of SiC MOSFETs is triggered by the body diode reverse recovery process, with high dv/dt over a temperature range of -75 to 175℃ [21].…”

Section: Introductionmentioning

confidence: 99%

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Comprehensive Assessment of Avalanche Operating Boundary of SiC Planar/Trench MOSFET in Cryogenic Applications

Yang

et al. 2021

IEEE Trans. Power Electron.

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The avalanche ruggedness of power devices becomes a crucial issue to ensure the safe operation of the power conversion systems, particularly under the extreme temperature conditions. In this paper, the avalanche capability of SiC planar/trench MOSFETs is systematically evaluated and analyzed over the temperature range of 90 to 340 K. Importantly, the essential mechanisms and temperature dependence of avalanche failure under cryogenic conditions are further explored by combining many analysis methods such as TCAD simulations, the unclamped inductive switching characterizations, and the transient junction temperature prediction. The highest avalanche energy density of 171.24 mJ/mm 2 at 90K indicates the great application potential of SiC planner MOSFET in cryogenic electronics. Moreover, the safe avalanche operation boundary (AOB) model is established over the cryogenic temperature range. The relevant analysis method and AOB model can be used to accurately evaluate and quantitatively predict the avalanche capability of SiC planar/trench MOSFETs for the cryogenic converter design.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Comprehensive Assessment of Avalanche Operating Boundary of SiC Planar/Trench MOSFET in Cryogenic Applications

Yang

et al. 2021

IEEE Trans. Power Electron.

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“…The major problem is simulation speed. If only considering short term high dissipated power effects like short circuit condition [41] and [42], instantaneous power loss based simulation is the only method available. However in these cases the long thermal time constants were not required.…”

Section: Electro-thermal Simulationsmentioning

confidence: 99%

Design Optimization of Hybrid-Switch Soft-Switching Inverters Using Multiscale Electrothermal Simulation

Reichl

Lai

Hefner

et al. 2017

IEEE Trans. Power Electron.

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The development of a fully automated tool that is used to optimize the design of a hybrid switch soft-switching inverter using a library of dynamic electro-thermal component models parameterized in terms of electrical, structural and material properties is presented. A multi-scale electro-thermal simulation approach is developed allowing for a large number of parametric studies involving multiple design variables to be considered, drastically reducing simulation time.Traditionally, electro-thermal simulation and analysis has been used to predict the behavior of pre-existing designs. While the traditional approach to electro-thermal analysis can help shape cooling requirements and heat sink designs to maintain certain junction temperatures, there is no guarantee that the design under study is the most optimal. This dissertation uses electro-thermal simulation to guarantee an optimal design and thus truly minimizing cooling requirements and improving device reliability.The proposed optimization tool is used to provide a step-by-step design optimization of a twocoupled magnetic hybrid soft-switching inverter. The soft-switching inverter uses a two-coupled magnetic approach for transformer reset condition [1], a variable timing control for achieving ZVS over the entire load range [2], and utilizes a hybrid switch approach for the main device [3].

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“…The initial conditions of the DUTs will impact the avalanche breakdown characteristics. The failure mode from UIS is parasitic BJT latch-up within the device which results from hole currents in the body causing a voltage drop between the source and p-body [32,33]. Within a single device, non-uniformities between parallel conducting FET cells accelerates BJT latch-up.…”

Section: Unclamped Inductive Switching Measurementsmentioning

confidence: 99%

Robustness and Balancing of Parallel-Connected Power Devices: SiC Versus CoolMOS

Alatise

Gonzalez

et al. 2016

IEEE Trans. Ind. Electron.

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Compact Electrothermal Reliability Modeling and Experimental Characterization of Bipolar Latchup in SiC and CoolMOS Power MOSFETs

Cited by 31 publications

References 35 publications

Comprehensive Assessment of Avalanche Operating Boundary of SiC Planar/Trench MOSFET in Cryogenic Applications

Comprehensive Assessment of Avalanche Operating Boundary of SiC Planar/Trench MOSFET in Cryogenic Applications

Design Optimization of Hybrid-Switch Soft-Switching Inverters Using Multiscale Electrothermal Simulation

Robustness and Balancing of Parallel-Connected Power Devices: SiC Versus CoolMOS

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