Atomic layer deposited Ta2O5 gate insulation for enhancing breakdown voltage of AlN/GaN high electron mobility transistors

Abstract

AlN/GaN heterostructures with a 3.5 nm AlN cap have been grown by molecular beam epitaxy followed by a 6 nm thick atomic layer deposited Ta2O5 film. Transistors fabricated with 150 nm length gates showed drain current density of 1.37 A/mm, transconductance of 315 mS/mm, and sustained drain-source biases up to 96 V while in the off-state before destructive breakdown as a result of the Ta2O5 gate insulator. Terman’s method has been modified for the multijunction capacitor and allowed the measurement of interface state density (∼1013 cm−2 eV−1). Small-signal frequency performance of 75 and 115 GHz was obtained for ft and fmax, respectively.

Preparation of gallium nitride surfaces for atomic layer deposition of aluminum oxide

“…[7][8][9][10] For this study, Al 2 O 3 was chosen because it has a large conduction band offset with respect to GaN as well as a high permittivity (8)(9)(10) which allows for support of greater electric fields. 9,11 Unfortunately, deposition of Al 2 O 3 on air exposed GaN(0001) does not readily form a low-defect interface.…”

Suppression of surface-originated gate lag by a dual-channel AlN/GaN high electron mobility transistor architecture

“…Gate lag results from a slow recovery from depletion of the channel charge due to proximal trapped charge [1], [2]. Interfacial trapped charge such as those at the oxide/AlN interface [28] can lead to gate lag [1]. Therefore, a temporally-sequential pulsed gate voltage lag measurement has been used to quantify the gate lag response of the dual-channel and recessed-gate HEMTs.…”

“…A self-consistent PoissonSchrodinger solver [27] was used to calculate band diagrams to show the effect with and without 6×10 13 cm −2 trapped charge at the Al 2 O 3 /AlN interface. The trap state density of 6×10 13 cm −2 was chosen for the band diagram simulations based off previous works that have extracted similar trap state densities of the oxide/AlN junction from high-frequency CV methods and have correlated the trap density to spatially-fixed interfacial polarization states of the AlN barrier [26], [28], [29]. The work function (Φ B = χ N i − χ ox , where χ is the electron affinity of the designated material layer) used for the Ni-Al 2 O 3 gate was 2 eV and band offsets taken from Ref.…”

Interface characteristics of spin-on-dielectric SiOx-buffered passivation layers for AlGaN/GaN high electron mobility transistors

“…The conductance method [14] can be more accurate than classical Terman method; however, it still has a drawback measuring interface states only with small emission times. Recently, more advanced different approaches quantifying D it with energy distributions that are different from those of Si/insulator, such as those for GaN/insulator interfaces, have been introduced [13,15,16]. For example, photo-assisted high-frequency C-V characterization [16] could reveal more accurate D it extraction by allowing the measurements in deep depletion in GaN interfaces.…”