Accurate Determination of Transport Parameters in Sub‐65 nm MOS Transistors

Mouis, M.; Ghibaudo, G.

doi:10.1002/9781118621523.ch14

Cited by 10 publications

(9 citation statements)

References 52 publications

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“…Using the g m results in Figure b, the Y-function method (YFM) was employed to extract device parameters such as the low-field mobility μ 0 , the contact resistance R SD , and the flat-band voltage V FB , plotted in Figure c–e. (Details of the YFM are provided in Figure S3. − )…”

Section: Discussionmentioning

confidence: 99%

Tunable Mobility in Double-Gated MoTe₂ Field-Effect Transistor: Effect of Coulomb Screening and Trap Sites

Joo

et al. 2017

ACS Appl. Mater. Interfaces

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There is a general consensus that the carrier mobility in a field-effect transistor (FET) made of semiconducting transition-metal dichalcogenides (s-TMDs) is severely degraded by the trapping/detrapping and Coulomb scattering of carriers by ionic charges in the gate oxides. Using a double-gated (DG) MoTe FET, we modulated and enhanced the carrier mobility by adjusting the top- and bottom-gate biases. The relevant mechanism for mobility tuning in this device was explored using static DC and low-frequency (LF) noise characterizations. In the investigations, LF-noise analysis revealed that for a strong back-gate bias the Coulomb scattering of carriers by ionized traps in the gate dielectrics is strongly screened by accumulation charges. This significantly reduces the electrostatic scattering of channel carriers by the interface trap sites, resulting in increased mobility. The reduction of the number of effective trap sites also depends on the gate bias, implying that owing to the gate bias, the carriers are shifted inside the channel. Thus, the number of active trap sites decreases as the carriers are repelled from the interface by the gate bias. The gate-controlled Coulomb-scattering parameter and the trap-site density provide new handles for improving the carrier mobility in TMDs, in a fundamentally different way from dielectric screening observed in previous studies.

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Section: Discussionmentioning

confidence: 99%

Tunable Mobility in Double-Gated MoTe₂ Field-Effect Transistor: Effect of Coulomb Screening and Trap Sites

Joo

et al. 2017

ACS Appl. Mater. Interfaces

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“…1, the C gc at the strong inversion region (V gs = 1 V) was plotted as a function of L M after eliminating parasitic capacitance estimated from the minimum value of C gc in accumulation region [5]. The DL (=L M À L eff ) were found around 15 nm and 10 nm for GO1 and GO2 devices, respectively, which were extracted by extrapolation to zero channel length [5,6].…”

Section: Device Under Test and Experimentsmentioning

confidence: 99%

In depth characterization of electron transport in 14 nm FD-SOI CMOS devices

Shin

Shi

Mouis

et al. 2015

Solid-State Electronics

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“…R sd can be extracted using the Y -function method: where W , L , and β are the channel width, length, and conductance gain ( W / L × C EDL × μ 0 ), respectively. Figure a shows the linear Y -function when V gb = 50 V. R sd can then be estimated as follows: where θ is the first-order mobility attenuation factor. θ ≈ 0.054 V –1 at the interface between the ionic-liquid-covered EDL and the MoS 2 surface was extracted from Figures S4 and S5, which is comparable with θ for Si-based transistors with high- k dielectrics .…”

Section: Results and Discussionmentioning

confidence: 99%

“…Figure a shows the linear Y -function when V gb = 50 V. R sd can then be estimated as follows: where θ is the first-order mobility attenuation factor. θ ≈ 0.054 V –1 at the interface between the ionic-liquid-covered EDL and the MoS 2 surface was extracted from Figures S4 and S5, which is comparable with θ for Si-based transistors with high- k dielectrics . As shown in Figure b, R sd decreases as V gb is increased, presumably because of electron accumulation under the extension.…”

Section: Results and Discussionmentioning

confidence: 99%

Junctionless Electric-Double-Layer MoS₂ Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

Jeon

Park

et al. 2023

ACS Appl. Mater. Interfaces

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Junctionless transistors are suitable for sub-3 nm applications because of their extremely simple structure and high electrical performance, which compensate for short-channel effects. Two-dimensional semiconductor transition-metal dichalcogenide materials, such as MoS2, may also resolve technical and fundamental issues for Si-based technology. Here, we present the first junctionless electric-double-layer field-effect transistor with an electrostatically highly doped 5 nm thick MoS2 channel. A double-gated MoS2 transistor with an ionic-liquid top gate and a conventional bottom gate demonstrated good transfer characteristics with a 104 on–off current ratio, a 70 mV dec–1 subthreshold swing at a 0 V bottom-gate bias, and drain-current versus top-gate-voltage characteristics were shifted left significantly with increasing bottom-gate bias due to an electrostatically increased overall charge carrier concentration in the MoS2 channel. When a bottom-gate bias of 80 V was applied, a shoulder and two clear peak features were identified in the transconductance and its derivative, respectively; this outcome is typical of Si-based junctionless transistors. Furthermore, the decrease in electron mobility induced by a transverse electric field was reduced with increasing bottom-gate bias. Numerical simulations and analytical models were used to support these findings, which clarify the operation of junctionless MoS2 transistors with an electrostatically highly doped channel.

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Accurate Determination of Transport Parameters in Sub‐65 nm MOS Transistors

Cited by 10 publications

References 52 publications

Tunable Mobility in Double-Gated MoTe₂ Field-Effect Transistor: Effect of Coulomb Screening and Trap Sites

Tunable Mobility in Double-Gated MoTe₂ Field-Effect Transistor: Effect of Coulomb Screening and Trap Sites

In depth characterization of electron transport in 14 nm FD-SOI CMOS devices

Junctionless Electric-Double-Layer MoS₂ Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

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Accurate Determination of Transport Parameters in Sub‐65 nm MOS Transistors

Cited by 10 publications

References 52 publications

Tunable Mobility in Double-Gated MoTe2 Field-Effect Transistor: Effect of Coulomb Screening and Trap Sites

Tunable Mobility in Double-Gated MoTe2 Field-Effect Transistor: Effect of Coulomb Screening and Trap Sites

In depth characterization of electron transport in 14 nm FD-SOI CMOS devices

Junctionless Electric-Double-Layer MoS2 Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel

Contact Info

Product

Resources

About

Tunable Mobility in Double-Gated MoTe₂ Field-Effect Transistor: Effect of Coulomb Screening and Trap Sites

Tunable Mobility in Double-Gated MoTe₂ Field-Effect Transistor: Effect of Coulomb Screening and Trap Sites

Junctionless Electric-Double-Layer MoS₂ Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel