For transition metal dichalcogenides, the fluctuation of the channel current due to charged impurities is attributed to a large surface area and a thickness of a few nanometers. To investigate current variance at the interface of transistors, we obtain the low-frequency (LF) noise features of MoTe2 multilayer field-effect transistors with different dielectric environments. The LF noise properties are analyzed using the combined carrier mobility and carrier number fluctuation model which is additionally parametrized with an interfacial Coulomb-scattering parameter (α) that varies as a function of the accumulated carrier density (Nacc) and the location of the active channel layer of MoTe2. Our model shows good agreement with the current power spectral density (PSD) of MoTe2 devices from a low to high current range and indicates that the parameter α exhibits a stronger dependence on Nacc with an exponent -γ of -1.18 to approximately -1.64 for MoTe2 devices, compared with -0.5 for Si devices. The raised Coulomb scattering of the carriers, particularly for a low-current regime, is considered to be caused by the unique traits of layered semiconductors such as interlayer coupling and the charge distribution strongly affected by the device structure under a gate bias, which completely change the charge screening effect in MoTe2 multilayer. Comprehensive static and LF noise analyses of MoTe2 devices with our combined model reveal that a chemical-vapor deposited h-BN monolayer underneath MoTe2 channel and the Al2O3 passivation layer have a dissimilar contribution to the reduction of current fluctuation. The three-fold enhanced carrier mobility due to the h-BN is from the weakened carrier scattering at the gate dielectric interface and the additional 30% increase in carrier mobility by Al2O3 passivation is due to the reduced interface traps.
The correlation between the channel thickness and the carrier mobility is investigated by conducting static and low frequency (LF) noise characterization for ambipolar carriers in multilayer MoTe2 transistors. For channel thicknesses in the range of 5–15 nm, both the low-field carrier mobility and the Coulomb-scattering-limited carrier mobility (μC) are maximal at a thickness of ∼10 nm. For LF noise, the interplay of interface trap density (NST), which was minimal at ∼10 nm, and the interfacial Coulomb scattering parameter (αSC), which decreased up to 10 nm and saturated above 10 nm, explained the mobility (μC) peaked near 10 nm by the carrier fluctuation and charge distribution.
There is a general consensus that the carrier mobility in a field-effect transistor (FET) made of semiconducting transition-metal dichalcogenides (s-TMDs) is severely degraded by the trapping/detrapping and Coulomb scattering of carriers by ionic charges in the gate oxides. Using a double-gated (DG) MoTe FET, we modulated and enhanced the carrier mobility by adjusting the top- and bottom-gate biases. The relevant mechanism for mobility tuning in this device was explored using static DC and low-frequency (LF) noise characterizations. In the investigations, LF-noise analysis revealed that for a strong back-gate bias the Coulomb scattering of carriers by ionized traps in the gate dielectrics is strongly screened by accumulation charges. This significantly reduces the electrostatic scattering of channel carriers by the interface trap sites, resulting in increased mobility. The reduction of the number of effective trap sites also depends on the gate bias, implying that owing to the gate bias, the carriers are shifted inside the channel. Thus, the number of active trap sites decreases as the carriers are repelled from the interface by the gate bias. The gate-controlled Coulomb-scattering parameter and the trap-site density provide new handles for improving the carrier mobility in TMDs, in a fundamentally different way from dielectric screening observed in previous studies.
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